TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 76

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

TXC-03305-MB
Ed. 4, September 2000
M13X
TXC-03305
Address
11
12
13
14
15
16
6-0
6-0
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
7
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
Symbol
R3OOF
R3LOS
R3CKF
(n=7-1)
(n=7-1)
T3CKF
R3AIS
R3IDL
IDL26
IDL22
IDL18
IDL14
IDL10
IDL27
IDL23
IDL19
IDL15
IDL11
IDL28
IDL24
IDL20
IDL16
IDL12
R2Xn
T2Xn
IDL6
IDL2
IDL7
IDL3
IDL8
IDL4
XR2
XR1
Reserved: This bit should always be written with a 0.
Internal DS1 Idle Channel/Loopback: The IDLn bits in this register are
used for generating and transmitting a DS1 idle pattern or for setting up a
local DS1 loopback for channel n. When register 1EH is written with a code
to disconnect the loopback on a channel in this register, and the corre-
sponding IDLn bit is written with a 1, the M13X generates and transmits a
DS1 idle pattern in that channel which is determined by the idle code selec-
tion bits (IDLB and IDLA in location 02H). When a code to connect a loop-
back on a channel in this register is written to register 1EH, and a 1 is
written into the corresponding IDLn bit, the DS1 channel is looped back
instead. The loopback is from the receive to the transmit direction. When
the IDLn bit is written with a 0, the DS1 transmit source is from the chan-
nel’s DTn/CTn leads.
Reserved: This bit should always be written with a 0.
Internal DS1 Idle Channel/Loopback: The IDLn bits in this register are
used for generating and transmitting a DS1 idle pattern or for setting up a
local DS1 loopback for channel n. When register 1EH is written with a code
to disconnect the loopback on a channel in this register, and the corre-
sponding IDLn bit is written with a 1, the M13X generates and transmits a
DS1 idle pattern in that channel which is determined by the idle code selec-
tion bits (IDLB and IDLA in location 02H). When a code to connect a loop-
back on a channel in this register is written to register 1EH, and a 1 is
written into the corresponding IDLn bit, the DS1 channel is looped back
instead. The loopback is from the receive to the transmit direction. When
the IDLn bit is written with a 0, the DS1 transmit source is from the chan-
nel’s DTn/CTn leads.
Reserved: This bit should always be written with a 0.
Internal DS1 Idle Channel/Loopback: The IDLn bits in this register are
used for generating and transmitting a DS1 idle pattern or for setting up a
local DS1 loopback for channel n. When register 1EH is written with a code
to disconnect the loopback on a channel in this register, and the corre-
sponding IDLn bit is written with a 1, the M13X generates and transmits a
DS1 idle pattern in that channel which is determined by the idle code selec-
tion bits (IDLB and IDLA in location 02H). When a code to connect a loop-
back on a channel in this register is written to register 1EH, and a 1 is
written into the corresponding IDLn bit, the DS1 channel is looped back
instead. The loopback is from the receive to the transmit direction. When
the IDLn bit is written with a 0, the DS1 transmit source is from the chan-
nel’s DTn/CTn leads.
Reserved: This bit should always be ignored.
Receive DS2 X-Bits: The bits in this location indicate the states of the
seven received DS2 channel X-bits.
Reserved: This bit should always be written with a 0.
Transmit DS2 X-bits: The bits in this location are used to set the states of
the seven transmitted DS2 channel X-bits. An X-bit off state is normally a 1.
Latched Receive Alarms/Status: The bits in this register location are the
same alarm/status bits listed in register location 00H, except the corre-
sponding bit latches on with an alarm. Bits 1 and 0 are the latched inverses
of the two X-bits received. When latched on they are equal to 0. A micro-
processor read cycle clears all these bits to their off states. If an alarm state
or status condition remains true, the corresponding bit relatches.
DATA SHEET
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Description