TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 56

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

TXC-03305-MB
Ed. 4, September 2000
M13X
TXC-03305
Notes:
1. This counter is not available when P1 and P0 are both set to high.
C-BIT INTERFACES
Transmit and receive DS3 C-bit interfaces are provided for inserting and extracting a set of the DS3 C-bits while
operating in C-bit Parity Format mode.
The transmit C-bit interface is comprised of four leads, CCKT (clock output), CDT (data input), CDCCT (data
link indication output), and CFMT (frame output). The following DS3 C-bits are accepted at this interface, C2,
C3, C4, C5, C6, C13, C14, C15, C16, C17, C18, C19, C20, and C21. A control bit C3CLKI is provided in bit 7
of register 19H which can enable or disable the clock pulse for the C3 (FEAC) C-bit. If it is desired to use the
internal Transmit FEAC Word register (1CH) or the Remote Loopback register (07H) to transmit FEAC mes-
sages and remote loopback requests, then the C3CLKI bit should be set to a 1 to disable the C3 C-bit from
being supplied by the external DS3 C-bit interface. If it is desired that the C3 C-bit be derived from external
logic instead of the Transmit FEAC Word register, then the C3CLKI bit should be set to a 0 to enable the C3 bit
to be sourced from the transmit C-bit interface. When the transmit PMDL controller is enabled, C13, C14, and
C15 are supplied by the transmit PMDL Controller, although CCKT will still contain the three clock pulses for
those C-bits. When the transmit PMDL controller is disabled, the transmitted C13, C14, and C15 C-bits are
taken from the transmit C-bit interface.
The receive C-bit interface is comprised of four leads, CCKR (clock output), CDR (data output), CDCCR (data
link indication output), and CFMR (frame output). The following DS3 C-bits are output at this interface: C2, C3,
C4, C5, C6, C13, C14, C15, C16, C17, C18, C19, C20, and C21. Unlike the transmit C-bit interface, all of the
indicated C-bits are always available.
FEBE Performance Counter (C-bit Parity Mode)/DS3 F-bit
and M-bit Error Counter (M13 Mode)
C-bit Parity Performance Counter (C-bit Parity Mode)/
Number of RX DS3 Frames Counter (M13 Mode)
P-bit Parity Performance Counter
DS3 F-bit and M-bit Error Counter
C1 Bit Equal to Zero Counter
DS3 M-bit Error Counter
RX FCS Error Counter
RX ABORT Counter
FEBE Performance Counter (C-bit Parity Mode)/DS3 F-bit
and M-bit Error Counter (M13 Mode)
C-bit Parity Performance Counter (C-bit Parity Mode)/
Number of RX DS3 Frames Counter (M13 Mode)
P-bit Parity Performance Counter
DS3 F-bit and M-bit Error Counter
C1 Bit Equal to Zero Counter (Note 1)
DS3 M-bit Error Counter (Note 1)
Counter Name
DATA SHEET
- 56 -
Address (Hex)
3C
1B
22
3B
1B
04
05
06
23
04
05
06
22
23
M13X lead
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Counter Size
(Bits)
16
16
16
16
16
16
16
16
8
8
8
8
8
8