ADUC836BSZ Analog Devices Inc, ADUC836BSZ Datasheet - Page 43

16bit Dual ADC With Embedded 8 Bit MCU

ADUC836BSZ

Manufacturer Part Number
ADUC836BSZ
Description
16bit Dual ADC With Embedded 8 Bit MCU
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC836BSZ

Core Processor
8052
Core Size
8-Bit
Speed
12.58MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PSM, PWM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Size
62KB (62K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.25 V
Data Converters
A/D 7x16b; D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
52-MQFP, 52-PQFP
Cpu Family
ADuC8xx
Device Core
8052
Device Core Size
8b
Frequency (max)
12.58MHz
Interface Type
I2C/SPI/UART
Total Internal Ram Size
2.25KB
# I/os (max)
26
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2(2-chx16-bit)
On-chip Dac
1-chx12-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
52
Package Type
MQFP
Package
52MQFP
Family Name
ADuC8xx
Maximum Speed
12.58 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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POWER SUPPLY MONITOR
As its name suggests, the Power Supply Monitor, once enabled,
monitors both supplies (AV
indicate when any of the supply pins drops below one of four
user-selectable voltage trip points from 2.63 V to 4.63 V. For cor-
rect operation of the Power Supply Monitor function, AV
be equal to or greater than 2.7 V. Monitor function is controlled via
the PSMCON SFR. If enabled via the IEIP2 SFR, the monitor
PSMCON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
REV. A
Name
CMPD
CMPA
PSMI
TPD1
TPD0
TPA1
TPA0
PSMEN
Description
DV
This is a read-only bit and directly reflects the state of the DV
Read 1 indicates the DV
Read 0 indicates the DV
AV
This is a read-only bit and directly reflects the state of the AVDD comparator.
Read 1 indicates the AV
Read 0 indicates the AV
Power Supply Monitor Interrupt Bit.
This bit will be set high by the MicroConverter if either CMPA or CMPD are low, indicating low analog or digital
supply. The PSMI Bit can be used to interrupt the processor. Once CMPD and/or CMPA return (and remain)
high, a 250 ms counter is started. When this counter times out, the PSMI interrupt is cleared. PSMI can also be
written by the user. However, if either comparator output is low, it is not possible for the user to clear PSMI.
DV
These bits select the DV
TPD1
0
0
1
1
AVDD Trip Point Selection Bits.
These bits select the AV
TPA1
0
0
1
1
Power Supply Monitor Enable Bit.
Set to 1 by the user to enable the Power Supply Monitor Circuit.
Cleared to 0 by the user to disable the Power Supply Monitor Circuit.
DD
DD
DD
DD
Power Supply Monitor Control Register
DFH
DEH
No
Comparator Bit.
Trip Point Selection Bits.
Comparator Bit.
or DV
DD
) on the ADuC836. It will
TPD0
0
1
0
1
TPA0
0
1
0
1
Table XX. PSMCON SFR Bit Designations
DD
DD
DD
DD
DD
DD
supply is above its selected trip point.
supply is below its selected trip point.
trip point voltage as follows:
supply is above its selected trip point.
supply is below its selected trip point.
trip point voltage as follows:
Selected DV
4.63
3.08
2.93
2.63
Selected AV
4.63
3.08
2.93
2.63
DD
must
–43–
DD
DD
will interrupt the core using the PSMI bit in the PSMCON SFR.
This bit will not be cleared until the failing power supply has
returned above the trip point for at least 250 ms. This monitor
function allows the user to save working registers to avoid possible
data loss due to the low supply condition, and also ensures that
normal code execution will not resume until a safe supply level
has been well established. The supply monitor is also protected
against spurious glitches triggering the interrupt circuit.
Trip Point (V)
Trip Point (V)
DD
comparator.
ADuC836

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