ADUC836BSZ Analog Devices Inc, ADUC836BSZ Datasheet - Page 22

16bit Dual ADC With Embedded 8 Bit MCU

ADUC836BSZ

Manufacturer Part Number
ADUC836BSZ
Description
16bit Dual ADC With Embedded 8 Bit MCU
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC836BSZ

Core Processor
8052
Core Size
8-Bit
Speed
12.58MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PSM, PWM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Size
62KB (62K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.25 V
Data Converters
A/D 7x16b; D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
52-MQFP, 52-PQFP
Cpu Family
ADuC8xx
Device Core
8052
Device Core Size
8b
Frequency (max)
12.58MHz
Interface Type
I2C/SPI/UART
Total Internal Ram Size
2.25KB
# I/os (max)
26
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2(2-chx16-bit)
On-chip Dac
1-chx12-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
52
Package Type
MQFP
Package
52MQFP
Family Name
ADuC8xx
Maximum Speed
12.58 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PRIMARY AND AUXILIARY ADC NOISE PERFORMANCE
Tables X, XI, and XII show the output rms noise in mV and output
peak-to-peak resolution in bits (rounded to the nearest 0.5 LSB)
for some typical output update rates on both the primary and
auxiliary ADCs. The numbers are typical and are generated at a
differential input voltage of 0 V.The output update rate is selected
SF
Word
13
69
255
SF
Word
13
69
255
SF
Word
13
69
255
*Based on a six-sigma limit, the rms resolution is 2.7 bits greater than the peak-to-peak resolution.
SF
Word
13
69
255
*ADC converting in Bipolar mode
ADuC836
Typical Output RMS Noise vs. Update Rate*
Data Update
Rate (Hz)
105.3
19.79
5.35
Data Update
Rate (Hz)
105.3
19.79
5.35
Data Update
Rate (Hz)
105.3
19.79
5.35
Output RMS Noise in V
Peak-to-Peak Resolution vs. Input Range and Update Rate; Peak-to-Peak Resolution in Bits
Data
R
105.3
19.79
5.35
Typical Output RMS Noise vs. Input Range and Update Rate; Output RMS Noise in V
ate (Hz)
Typical RMS Resolution vs. Input Range and Update Rate: RMS Resolution in Bits*
Update
20 mV
1.50
0.60
0.35
20 mV
12
13.5
14
20 mV
14.7
16
16
Table X. Primary ADC, Typical Output RMS Noise (V)
Table XI. Primary ADC, Peak-to-Peak Resolution (Bits)
40 mV
1.50
0.65
0.35
40 mV
13
14
15
40 mV
15.7
16
16
Input Range
2.5 V
10.75
2.00
1.15
Table XII. Auxiliary ADC
80 mV
1.60
0.65
0.37
80 mV
14
15
16
80 mV
16
16
16
–22–
via the Sinc Filter (SF) SFR. It is important to note that the
peak-to-peak resolution figures represent the resolution for which
there will be no code flicker within a six-sigma limit.
The QuickStart Development system PC software comes com-
plete with an ADC noise evaluation tool. This tool can be easily
used with the evaluation board to see these figures from silicon.
Input Range
160 mV
1.75
0.65
0.37
Input Range
160 mV
15
16
16
Input Range
160 mV
16
16
16
SF
Word
13
69
255
NOTES
1
2
ADC converting in Bipolar mode
In Unipolar mode, peak-to-peak resolution at 105 Hz is 15 bits.
Peak-to-Peak Resolution vs. Update Rate
Peak-to-Peak Resolution in Bits
320 mV
3.50
0.65
0.37
320 mV
15
16
16
320 mV
16
16
16
Data Update
Rate (Hz)
105.3
19.79
5.35
640 mV
4.50
0.95
0.51
640 mV
15.5
16
16
640 mV
16
16
16
1.28 V
6.70
1.40
0.82
1.28 V
16
16
16
1.28 V
16
16
16
Input Range
2.5 V
16
16
16
2
1
2.56 V
11.75
2.30
1.25
2.56 V
16
16
16
2.56 V
16
16
16
REV. A

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