ADUC7032BSTZ-88-RL Analog Devices Inc, ADUC7032BSTZ-88-RL Datasheet - Page 89

• Manufacturer Part Number: ADUC7032BSTZ-88-RL
• Description: Flash 96k ARM7 TRIPLE 16-Bit ADC LIN IC.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-88-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

HIGH VOLTAGE PERIPHERAL CONTROL INTERFACE
The ADuC7032-8L integrates a number of high voltage circuit
functions that are controlled and monitored via a registered
interface consisting of two MMRs, namely, HVCON and
HVDAT. The HVCON register acts as a command byte
interpreter, allowing the microcontroller to indirectly read or
write 8-bit data (the value in HVDAT) from or to one of four
high voltage status or configuration registers. It should be noted
that these high voltage registers are not MMRs but are so-called
indirect registers that can only be accessed (as the name
suggests) indirectly, via the HVCON and HVDAT MMRs.
The physical interface between the HVCON register and the
indirect high voltage registers is a 2-wire (data and clock) serial
interface based on a 2.56 MHz serial clock. Therefore, there is a
finite, 10 μs (maximum) latency between the MCU core writing
a command into HVCON and that command or data reaching
the indirect high voltage registers. There is also a finite 10 μs
latency between the MCU core writing a command into HVCON
PERIPHERALS
ARM7
MCU
AND
WU DIAGNOSTIC INPUT
STI DIAGNOSTIC INPUT
LIN DIAGNOSTIC INPUT
IRQ3
(IRQEN[16])
HIGH VOLTAGE
INTERFACE
HVCON
HVDAT
MMRs
HVCFG0[4]
HVCFG1[3]
HVCFG1[7]
HVCFG1[5]
Figure 37. High Voltage Interface, Top Level Block Diagram
P2.6
P2.5
SERIAL
SERIAL
CLOCK
DATA
HIGH VOLTAGE
CONTROLLER
ATTENUATOR
DIAGNOSTIC
Rev. A | Page 89 of 120
BUFFER
HIGH VOLTAGE
CONTROLLER
AND
CONTROLLER
INTERFACE
INTERRUPT
SERIAL
HVCFG1[6]
and indirect register data being read back into the HVDAT
register.
A busy bit (Bit 0 of the HVCON, when read by the MCU) can
be polled by the MCU to confirm when a read/write command
has completed.
Figure 37 describes the top-level architecture of the high voltage
interface and related circuits. The following high voltage circuit
functions are controlled and monitored via this interface:
•
•
•
•
•
•
•
•
WU DIAGNOSTIC OUTPUT
HVMON[7]
STI DIAGNOSTIC OUTPUT
HVMON[5]
LIN DIAGNOSTIC OUTPUT
P2.4
Precision oscillator
Wake-up pin functionality
Power supply monitor
Low voltage flag
LIN operating modes
High voltage diagnostics
High voltage attenuator/buffer circuit
High voltage temperature
PSM—HVSTA[5]
WU—HVSTA[4]
OVER TEMP—HVSTA[3]
LIN S-SCT—HVSTA[2]
STI S-SCT—HVSTA[1]
WU S-SCT—HVSTA[0]
HIGH-VOLTAGE
REGISTERS
MONITOR
(INDIRECT)
HV TEMP
HVCFG0
HVCFG1
HVMON
HVSTA
HVCFG0[6]
HVCFG0[3]
HVCFG0[2]
HVCFG0[1:0]
HVCFG0[5]
HVCFG0[4]
HVCFG1[4]
HVCFG1[4]
HVCFG1[3]
OSCILLATOR
PRECISION
CONTROL
CONTROL
MODES
WU I/O
STI I/O
PSM
LVF
LIN
ADuC7032-8L