ADUC7032BSTZ-88-RL Analog Devices Inc, ADUC7032BSTZ-88-RL Datasheet - Page 60

• Manufacturer Part Number: ADUC7032BSTZ-88-RL
• Description: Flash 96k ARM7 TRIPLE 16-Bit ADC LIN IC.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-88-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ADuC7032-8L
POWER SUPPLY SUPPORT CIRCUITS
The ADuC7032-8L incorporates an on-chip, low dropout
(LDO) regulator that is driven directly from the battery voltage
to generate a 2.6 V internal supply. This 2.6 V supply is then
used as the supply voltage for the ARM7 MCU and peripherals,
including the precision analog circuits on-chip.
Power-on reset (POR), power supply monitor (PSM), and low
voltage flag (LVF) functions are also integrated to ensure safe
operation of the MCU, as well as continuous monitoring of the
battery power supply.
The POR circuit is designed to handle all battery ramp rates and
guarantee full functional operation of the Flash/EE memory-based
MCU during power-on and power-down cycles.
As shown in Figure 26, once the supply voltage (VDD) reaches
a minimum operating voltage of 3 V, a POR signal keeps the
ARM core in reset for 20 ms. This ensures that the regulated
power supply voltage (REG_DVDD) supplied to the ARM core
and associated peripherals is above the minimum operational
voltage to guarantee full functionality. A POR flag is set in the
RSTSTA MMR to indicate a POR reset event has occurred.
(INTERNAL SIGNAL)
RESET_CORE
ENABLE_PSM
ENABLE_LVF
REG_DVDD
POR_TRIP
VDD
3.0V TYP
Figure 26. Typical Power-On Cycle
2.6V
12V
20ms TYP
Rev. A | Page 60 of 120
The ADuC7032-8L also features a power supply monitor (PSM)
function. Once enabled via HVCFG0[3], the PSM continuously
monitors the voltage at the VDD pin. If this voltage drops below
6.0 V typical, the PSM flag is automatically asserted and can, if
the high voltage IRQ is enabled via IRQ/FIQEN[16], generate a
system interrupt. An example of this operation is shown in
Figure 26.
At voltages below the POR level, an additional low voltage flag
can be enabled (HVCFG0[2]). It can be used to indicate that the
contents of the SRAM are still valid after a reset event. The
operation of the low voltage flag is shown in Figure 26. Once
enabled, the status of this bit can be monitored via HVMON[3].
If this bit is set, the SRAM contents are valid. If this bit is
cleared, the SRAM contents may have been corrupted.
PSM TRIP 6.0V TYP
POR TRIP 3.0V TYP
LVF TRIP 2.1V TYP