ADUC7032BSTZ-88-RL Analog Devices Inc, ADUC7032BSTZ-88-RL Datasheet - Page 17

• Manufacturer Part Number: ADUC7032BSTZ-88-RL
• Description: Flash 96k ARM7 TRIPLE 16-Bit ADC LIN IC.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-88-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Pin No.
6
7
8, 34, 35
9, 16, 17,
23, 25, 26,
32, 38, 39,
40, 43, 45
10
11
12
13
14
15
18
19
20
21, 22
24
27
28
29
30
31
33
Mnemonic
TCK
TDI
DGND
NC
TDO
NTRST
TMS
VBAT
VREF
GND_SW
VTEMP
IIN+
IIN−
AGND
REG_AVDD
GPIO_0/IRQ0/SS
GPIO_1/SCLK
GPIO_2/MIS0
GPIO_3/MOSI
GPIO_4/ECLK
REG_DVDD
Type
I
I
S
O
I
I
I
I
S
I
I
I
S
S
I/O
I/O
I/O
I/O
I/O
S
1
Description
JTAG Test Clock. This clock input pin is one of the standard 5-pin JTAG debug ports on the part.
It is an input pin only, and it has an internal, weak, pull-up resistor. When not in use, this pin
remains unconnected.
JTAG Test Data Input. This data input pin is one of the standard 5-pin JTAG debug ports on the
part. It is an input pin only, and it has an internal, weak, pull-up resistor. When not in use, this pin
remains unconnected.
Ground Reference for On-Chip Digital Circuits.
No Connect. This pin is not connected internally but is reserved for possible future use. Therefore,
this pin should not be connected externally. NC pins can be grounded, if required.
JTAG Test Data Output. This data output pin is one of the standard 5-pin JTAG debug ports on
the part. It is an output pin only. At power-on, this output is disabled and pulled high via an
internal, weak, pull-up resistor. When not in use, this pin remains unconnected.
JTAG Test Reset. This reset input pin is one of the standard 5-pin JTAG debug ports on the part.
It is an input pin only, and it has an internal, weak, pull-down resistor. When not in use, this pin
remains unconnected. It is also monitored by the on-chip kernel to enable LIN boot load mode.
JTAG Test Mode Select. This mode select input pin is one of the standard 5-pin JTAG debug ports
on the part. It is an input pin only, and it has an internal, weak, pull-up resistor. When not in use,
this pin remains unconnected.
Battery Voltage Input to Resistor Divider.
External Reference Input Terminal. If this input is not used, connect it directly to the AGND
system ground.
Switch to Internal Analog Ground Reference. Negative input for external temperature channel
and external reference. If this input is not used, connect it directly to the AGND system ground.
External Pin for NTC/PTC Temperature Measurement.
Positive Differential Input for Current Channel.
Negative Differential Input for Current Channel.
Ground Reference for On-Chip Precision Analog Circuits.
Nominal 2.6 V Output from On-Chip Regulator.
General-Purpose Digital I/O 0, External Interrupt Request 0, or SPI Interface. By default and after
power-on reset, this pin is configured as an input. The pin has an internal, weak, pull-up resistor
and, when not in use, it remains unconnected. This multifunction pin can be configured in one
of three states, namely
General-Purpose Digital I/O 1 or SPI Interface. By default and after power-on reset, this pin is
configured as an input. The pin has an internal, weak, pull-up resistor and, when not in use, it
remains unconnected. This multifunction pin can be configured in one of two states, namely
General-Purpose Digital I/O 2 or SPI Interface. By default and after power-on reset, this pin is
configured as an input. The pin has an internal, weak, pull-up resistor and, when not in use, it
remains unconnected.This multifunction pin can be configured in one of two states, namely
General-Purpose Digital I/O 3 or SPI Interface. By default and after power-on reset, this pin is
configured as an input. The pin has an internal, weak, pull-up resistor and, when not in use, it
remains unconnected. This multifunction pin can be configured in one of two states, namely
General-Purpose Digital I/O 4 or Clock Output. By default and after power-on reset, this pin is
configured as an input. The pin has an internal, weak, pull-up resistor and, when not in use, it
remains unconnected. This programmable digital I/O pin can also be configured to output
a 2.56 MHz clock.
Nominal 2.6 V Output from the On-Chip Regulator.
General-Purpose Digital I/O 0.
External Interrupt Request 0, active high.
SPI interface, slave select input.
General-Purpose Digital I/O 1.
SPI interface, serial clock input.
General-Purpose Digital I/O 2.
SPI interface, master input/slave output pin.
General-Purpose Digital I/O 3.
SPI interface, master output/slave input pin.
Rev. A | Page 17 of 120
ADuC7032-8L