PIC16F767-E/ML Microchip Technology, PIC16F767-E/ML Datasheet - Page 69

• Manufacturer Part Number: PIC16F767-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F767-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.4
This section is not applicable to the PIC16F737 or
PIC16F767.
PORTD is an 8-bit port with Schmitt Trigger input
buffers. Each pin is individually configureable as an
input or output.
PORTD can be configured as an 8-bit wide micro-
processor port (Parallel Slave Port) by setting control
bit, PSPMODE (TRISE<4>). In this mode, the input
buffers are TTL.
TABLE 5-7:
TABLE 5-8:
 2004 Microchip Technology Inc.
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
08h
88h
89h
Legend:
Note 1:
Address
Name
PORTD and TRISD Registers
PORTD
TRISD
TRISE
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
RE3 is an input only. The state of the TRISE3 bit has no effect and will always read ‘1’.
Name
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
PORTD FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PORTD Data Direction Register
Bit 7
RD7
IBF
Bit 6
RD6
OBF
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
IBOV
Bit 5
RD5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
PSPMODE
Bit 4
RD4
Input/output port pin or Parallel Slave Port bit 0.
Input/output port pin or Parallel Slave Port bit 1.
Input/output port pin or Parallel Slave Port bit 2.
Input/output port pin or Parallel Slave Port bit 3.
Input/output port pin or Parallel Slave Port bit 4.
Input/output port pin or Parallel Slave Port bit 5.
Input/output port pin or Parallel Slave Port bit 6.
Input/output port pin or Parallel Slave Port bit 7.
Bit 3
RD3
—
(1)
PORTE Data Direction bits
FIGURE 5-18:
Bit 2
RD2
Note 1: I/O pins have protection diodes to V
Data Bus
WR Port
WR TRIS
RD TRIS
RD Port
Bit 1
RD1
Function
TRIS Latch
Data Latch
D
D
CK
CK
Bit 0
RD0
PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)
Q
Q
PIC16F7X7
Q
xxxx xxxx
1111 1111
0000 1111
POR, BOR
Value on:
EN
EN
Schmitt
D
Trigger
DS30498C-page 67
Buffer
Input
DD
and V
uuuu uuuu
1111 1111
0000 1111
Value on
all other
SS
Resets
I/O pin
.
(1)