PIC16F767-E/ML Microchip Technology, PIC16F767-E/ML Datasheet - Page 265

• Manufacturer Part Number: PIC16F767-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F767-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INDEX
A
A/D
Absolute Maximum Ratings .............................................. 207
ACKSTAT ......................................................................... 123
ACKSTAT Status Flag ...................................................... 123
ADCON0 Register
Addressable Universal Synchronous Asynchronous
ADRESL Register ............................................................. 154
Application Notes
Assembler
AUSART
 2004 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ........................ 155
Acquisition Requirements ......................................... 156
ADRESH Register..................................................... 154
Analog Port Pins ......................................................... 68
Analog-to-Digital Converter....................................... 151
Associated Registers ................................................ 160
Automatic Acquisition Time....................................... 157
Calculating Acquisition Time..................................... 156
Configuring Analog Port Pins.................................... 158
Configuring the Module............................................. 155
Conversion Clock...................................................... 157
Conversion Requirements ........................................ 236
Conversion Status (GO/DONE Bit) ........................... 154
Conversions .............................................................. 159
Delays ....................................................................... 156
Effects of a Reset...................................................... 160
Internal Sampling Switch (Rss)
Operation During Sleep ............................................ 160
Operation in Power-Managed Modes ....................... 158
Source Impedance.................................................... 156
Time Delays .............................................................. 156
Use of the CCP Trigger............................................. 160
GO/DONE Bit............................................................ 154
Receiver Transmitter. See AUSART
AN546 (Using the Analog-to-Digital (A/D)
AN552 (Implementing Wake-up
AN556 (Implementing a Table Read) ......................... 29
AN607 (Power-up Trouble Shooting)........................ 173
MPASM Assembler................................................... 201
Address Detect Enable (ADDEN Bit) ........................ 134
Addressable Universal Synchronous
Asynchronous
Asynchronous Mode ................................................. 138
Asynchronous Receive with Address Detect.
Asynchronous Reception
Asynchronous Reception with Address Detect
Impedance ........................................................ 156
Converter) ......................................................... 151
on Key Stroke) .................................................... 56
Asynchronous Receiver Transmitter................. 133
Receiver
Receiver............................................................ 140
Transmitter........................................................ 138
See Asynchronous Receive (9-bit Mode).
Associated Registers ................................ 141, 143
Setup ................................................................ 141
Setup ................................................................ 142
(9-Bit Mode) .............................................. 142
B
Banking, Data Memory ....................................................... 15
Baud Rate Generator ....................................................... 119
BF ..................................................................................... 123
BF Status Flag .................................................................. 123
Asynchronous Transmission
Baud Rate Generator (BRG) .................................... 135
Clock Source Select (CSRC Bit) .............................. 133
Continuous Receive Enable
Framing Error (FERR Bit) ......................................... 134
Overrun Error (OERR Bit)......................................... 134
Receive Data, 9th Bit (RX9D Bit).............................. 134
Receive Enable, 9-Bit (RX9 Bit) ............................... 134
Serial Port Enable (SPEN Bit) .......................... 133, 134
Single Receive Enable (SREN Bit)........................... 134
Synchronous Master Mode....................................... 144
Synchronous Master Reception
Synchronous Master Transmission
Synchronous Slave Mode......................................... 148
Synchronous Slave Reception
Synchronous Slave Transmission
Transmit Data, 9th Bit (TX9D) .................................. 133
Transmit Enable (TXEN Bit) ..................................... 133
Transmit Enable, 9-Bit (TX9 Bit)............................... 133
Transmit Shift Register Status
Associated Registers........................................ 139
Setup ................................................................ 139
Associated Registers........................................ 135
Baud Rate Formula .......................................... 135
Baud Rates, Asynchronous Mode
Baud Rates, Asynchronous Mode
High Baud Rate Select (BRGH Bit) .................. 133
INTRC Baud Rates, Asynchronous Mode
INTRC Baud Rates, Asynchronous Mode
Sampling .......................................................... 135
(CREN Bit)........................................................ 134
Reception ......................................................... 146
Transmission .................................................... 144
Associated Registers........................................ 146
Setup ................................................................ 146
Associated Registers........................................ 145
Setup ................................................................ 144
Reception ......................................................... 149
Transmit............................................................ 148
Associated Registers........................................ 149
Setup ................................................................ 149
Associated Registers........................................ 148
Setup ................................................................ 148
(TRMT Bit) ........................................................ 133
(BRGH = 0)............................................... 136
(BRGH = 1)............................................... 136
(BRGH = 0)............................................... 137
(BRGH = 1)............................................... 137
PIC16F7X7
DS30498C-page 263