PIC16F767-E/ML Microchip Technology, PIC16F767-E/ML Datasheet - Page 33

• Manufacturer Part Number: PIC16F767-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F767-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.0
The Flash program memory is readable during normal
operation over the entire V
addressed through Special Function Registers (SFR).
Up to 14-bit numbers can be stored in memory for use
as calibration parameters, serial numbers, packed 7-bit
ASCII, etc. Executing a program memory location
containing data that forms an invalid instruction results
in a NOP.
There are five SFRs used to read the program and
memory. These registers are:
• PMCON1
• PMDATA
• PMDATH
• PMADR
• PMADRH
The program memory allows word reads. Program
memory access allows for checksum calculation and
reading calibration tables.
REGISTER 3-1: PMCON1: PROGRAM MEMORY CONTROL REGISTER 1 (ADDRESS 18Ch)
 2004 Microchip Technology Inc.
READING PROGRAM MEMORY
bit 7
bit 6-1
bit 0
bit 7
Reserved: Read as ‘1’
Unimplemented: Read as ‘0’
RD: Read Control bit
1 = Initiates a Flash read, RD is cleared in hardware. The RD bit can only be set (not cleared)
0 = Flash read completed
Legend:
R = Readable bit
-n = Value at POR
reserved
R-1
in software.
DD
range. It is indirectly
U-0
—
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
—
When interfacing to the program memory block, the
PMDATH:PMDATA registers form a two-byte word
which
PMADRH:PMADR registers form a two-byte word
which holds the 13-bit address of the Flash location
being accessed. These devices can have up to
8K words of program Flash, with an address range
from 0h to 3FFFh. The unused upper bits in both the
PMDATH and PMADRH registers are not implemented
and read as ‘0’s.
3.1
The address registers can address up to a maximum of
8K words of program Flash.
When selecting a program address value, the MSB of
the address is written to the PMADRH register and the
LSB is written to the PMADR register. The upper Most
Significant bits of PMADRH must always be clear.
3.2
PMCON1 is the control register for memory accesses.
The control bit, RD, initiates read operations. This bit
cannot be cleared, only set, in software. It is cleared in
hardware at the completion of the read operation.
holds
PMADR
PMCON1 Register
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-x
—
the
14-bit
U-0
—
PIC16F7X7
data
x = Bit is unknown
U-0
—
DS30498C-page 31
for
reads.
R/S-0
RD
bit 0
The