ATMEGA168PA-PU Atmel, ATMEGA168PA-PU Datasheet - Page 69

MCU, 8BIT, AVR, 16K FLASH, 28PDIP

ATMEGA168PA-PU

Manufacturer Part Number
ATMEGA168PA-PU
Description
MCU, 8BIT, AVR, 16K FLASH, 28PDIP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA168PA-PU

Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
16KB
Oscillator Type
External, Internal
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA168PA-PU
Manufacturer:
TI
Quantity:
1 240
11.5
11.5.1
8271C–AVR–08/10
Register Description
Moving Interrupts Between Application and Boot Space, ATmega88A/88PA, ATmega168A/168PA and
ATmega328/328P
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in ATmega328/328P is:
The MCU Control Register controls the placement of the Interrupt Vector table.
MCUCR – MCU Control Register
Note:
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
Self-Programming” on page 279
tables, a special write procedure must be followed to change the IVSEL bit:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Bit
0x35 (0x55)
Read/Write
Initial Value
;
.org 0x3C00
0x3C00
0x3C01
0x3C02
0x3C03
0x3C04
0x3C05
Address Labels Code
;
.org 0x3C00
0x3C00
0x3C02
0x3C04
...
0x3C32
;
0x3C33
0x3C34
0x3C35
0x3C36
0x3C37
0x3C38
1. BODS and BODSE only available for picoPower devices ATmega48PA/88PA/168PA/328P
RESET: ldi
RESET: ldi
R
7
0
out
ldi
out
sei
<instr>
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
BODS
R/W
6
0
(1)
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
EXT_INT1
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
BODSE
xxx
xxx
for details. To avoid unintentional changes of Interrupt Vector
R/W
5
0
(1)
PUD
R/W
4
0
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
”Boot Loader Support – Read-While-Write
R
3
0
R
2
0
IVSEL
R/W
1
0
IVCE
R/W
0
0
MCUCR
69

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