ATMEGA168PA-PU Atmel, ATMEGA168PA-PU Datasheet - Page 41

MCU, 8BIT, AVR, 16K FLASH, 28PDIP

ATMEGA168PA-PU

Manufacturer Part Number
ATMEGA168PA-PU
Description
MCU, 8BIT, AVR, 16K FLASH, 28PDIP
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA168PA-PU

Controller Family/series
Atmega
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
16KB
Oscillator Type
External, Internal
Rohs Compliant
Yes

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA168PA-PU
Manufacturer:
TI
Quantity:
1 240
9.5
9.6
9.7
8271C–AVR–08/10
Power-down Mode
Power-save Mode
Standby Mode
When the SM2...0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the external Oscillator is stopped, while the external interrupts, the 2-
wire Serial Interface address watch, and the Watchdog continue operating (if enabled). Only an
External Reset, a Watchdog System Reset, a Watchdog Interrupt, a Brown-out Reset, a 2-wire
Serial Interface address match, an external level interrupt on INT0 or INT1, or a pin change
interrupt can wake up the MCU. This sleep mode basically halts all generated clocks, allowing
operation of asynchronous modules only.
Note:
When waking up from Power-down mode, there is a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable after
having been stopped. The wake-up period is defined by the same CKSEL Fuses that define the
Reset Time-out period, as described in
When the SM2...0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. This mode is identical to Power-down, with one exception:
If Timer/Counter2 is enabled, it will keep running during sleep. The device can wake up from
either Timer Overflow or Output Compare event from Timer/Counter2 if the corresponding
Timer/Counter2 interrupt enable bits are set in TIMSK2, and the Global Interrupt Enable bit in
SREG is set.
If Timer/Counter2 is not running, Power-down mode is recommended instead of Power-save
mode.
The Timer/Counter2 can be clocked both synchronously and asynchronously in Power-save
mode. If Timer/Counter2 is not using the asynchronous clock, the Timer/Counter Oscillator is
stopped during sleep. If Timer/Counter2 is not using the synchronous clock, the clock source is
stopped during sleep. Note that even if the synchronous clock is running in Power-save, this
clock is only available for Timer/Counter2.
When the SM2...0 bits are 110 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
If a level triggered interrupt is used for wake-up from Power-down, the required level must be held
long enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disap-
pears before the end of the Start-up Time, the MCU will still wake up, but no interrupt will be
generated.
Fuses as described in
”External Interrupts” on page
”System Clock and Clock Options” on page
”Clock Sources” on page
71. The start-up time is defined by the SUT and CKSEL
27.
26.
41

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