ATMEGA168PA-PU Atmel, ATMEGA168PA-PU Datasheet - Page 272

• Manufacturer Part Number: ATMEGA168PA-PU
• Description: MCU, 8BIT, AVR, 16K FLASH, 28PDIP
• Manufacturer: Atmel

Specifications of ATMEGA168PA-PU

• Controller Family/series: Atmega
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 16KB
• Oscillator Type: External, Internal
• Rohs Compliant: Yes

25.2.1
25.2.2
8271C–AVR–08/10
EEPROM Write Prevents Writing to SPMCSR
Reading the Fuse and Lock Bits from Software
Figure 25-1. Addressing the Flash During SPM
Note:
Note that an EEPROM write operation will block all software programming to Flash. Reading the
Fuses and Lock bits from software will also be prevented during the EEPROM write operation. It
is recommended that the user checks the status bit (EEPE) in the EECR Register and verifies
that the bit is cleared before writing to the SPMCSR Register.
It is possible to read both the Fuse and Lock bits from software. To read the Lock bits, load the
Z-pointer with 0x0001 and set the BLBSET and SELFPRGEN bits in SPMCSR. When an LPM
instruction is executed within three CPU cycles after the BLBSET and SELFPRGEN bits are set
in SPMCSR, the value of the Lock bits will be loaded in the destination register. The BLBSET
and SELFPRGEN bits will auto-clear upon completion of reading the Lock bits or if no LPM
instruction is executed within three CPU cycles or no SPM instruction is executed within four
CPU cycles. When BLBSET and SELFPRGEN are cleared, LPM will work as described in the
Instruction set Manual.
The algorithm for reading the Fuse Low byte is similar to the one described above for reading
the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and set the BLBSET
and SELFPRGEN bits in SPMCSR. When an LPM instruction is executed within three cycles
after the BLBSET and SELFPRGEN bits are set in the SPMCSR, the value of the Fuse Low byte
(FLB) will be loaded in the destination register as shown below.See
a detailed description and mapping of the Fuse Low byte.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Bit
Rd
Bit
Rd
Z - REGISTER
1. The different variables used in
PROGRAM MEMORY
BIT
PAGE
PROGRAM
COUNTER
15
FLB7
7
7
–
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
PCMSB
FLB6
6
6
–
PCPAGE
FLB5
5
5
–
Figure 26-3
ZPAGEMSB
PAGEMSB
FLB4
PCWORD
4
–
4
WORD ADDRESS
WITHIN A PAGE
(1)
are listed in
1
FLB3
0
0
3
–
3
INSTRUCTION WORD
PAGE
Table 27-11 on page
FLB2
2
–
2
Table 27-5 on page 298
FLB1
LB2
1
1
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
FLB0
301.
LB1
0
0
272
for