WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 379

• Manufacturer Part Number: WG82574IT S LBAC
• Description: CONTROLLER, ENET, INTEL 82574IT, 64PQFN
• Manufacturer: Intel

Specifications of WG82574IT S LBAC

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Driver Programing Interface—82574 GbE Controller
10.2.9.5
10.2.9.6
10.2.9.7
10.2.9.8
RX Time Stamp Attributes High- RXSATRH (Offset 0x0B630; RW)
RX Ethertype and Message Type Register - RXCFGL (Offset 0B634;
RW)
RX UDP Port - RXUDP (Offset 0x0B638; RW)
TX Time Sync Control Register - TSYNCTXCTL (Offset 0B614; RW)
31:16
23:16
31:24
31:16
15:0
31:5
15:0
15:0
3:1
Bit
Bit
Bit
Bit
0
4
Type
Type
RW
RW
RW
RW
RO
Type
RO/V
Type
RW
RO
RO
RO
RO
0x88F7
Reset
0x319
Reset
0x0
0x0
0x0
Reset
Reset
0x0
0x0
0
0
0
0
UPORT
UDP port number to time stamp.
The value of this register is programmed/read in network order.
Reserved
PTP L2 EtherType to time stamp.
The value of this register is programmed/read in network order.
V1 control to time stamp.
V2 messageId to time stamp.
TXTT
Tx time stamp valid. Equals 1b when a valid value for Tx
timestamp is captured in the Tx time stamp register. Cleared by
read of Tx time stamp register TXSTMPH.
Reserved
EN
Enable TX timestamp
0x0 = Time stamping disabled.
0x1 = Time stamping enabled.
Reserved
SourceIDH
Sourceuuid high
The value of this register is in host order.
SequenceID
SequenceI
The value of this register is in host order.
Description
Description
Description
Description
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