WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 196

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WG82574IT S LBAC

Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet

Specifications of WG82574IT S LBAC

Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 46.
Note:
Table 47.
Table 48.
Table 49.
196
1. Should be all zero.
V1 and V2 PTP Message Structure
Only the fields with the bold italic format colored red are of interest to the hardware.
PTP Message Over Layer 2
PTP Message Over Layer 4
When a PTP packet is recognized (by Ethertype or UDP port address) on the Rx side,
the version should be checked. If it is V1, then the control field at offset 32 should be
compared to control field in register described at
at offset 0 (messageId) should be used for comparison to messageId field.
The rest of the needed fields are at the same location and size for both V1 and V2
versions.
Message Decoding for V1 (Control Field at Offset 32)
PTP_SYNC_MESSAGE
PTP_DELAY_REQ_MESSAGE
PTP_FOLLOWUP_MESSAGE
PTP_DELAY_RESP_MESSAGE
PTP_MANAGEMENT_MESSAGE
Reserved
Offset in Bytes
Ethernet (L2)
Ethernet (L2)
Bits
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Enumeration
Sourceuuid
sourceportid
sequenceId
control
reserved
flags
VLAN (Optional)
7 6 5 4 3 2 1 0
IP (L3)
V1 Fields
PTP Ethertype
Sourceuuid
sourceportid
sequenceId
control
logMessagePeriod
N/A
UDP
Value
5–255
0
1
2
3
4
7 6 5 4 3 2 1 0
section
V2 Fields
82574 GbE Controller—Inline Functions
PTP message
PTP message
10.2.9.7. Otherwise the byte

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