IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 7

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
FlexCAN(2)
Mnemonic
eSDHC(2)
GPIO(4)
EPIT(2)
GPT(4)
Block
ESAI
FEC
Enhanced
periodic
interrupt timer
Enhanced
serial audio
interface
Enhanced
multimedia
card/
secure digital
host controller
Fast ethernet
controller
Controller
area network
module
General
purpose I/O
modules
General
purpose
timers
Block Name
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Table 3. i.MX25 Digital and Analog Modules (continued)
Timer
peripherals
Connectivity
peripherals
Connectivity
peripherals
Connectivity
peripherals
Connectivity
peripherals
System control
peripherals
Timer
peripherals
Subsystem
Each Enhanced Periodic Interrupt Timer (EPIT) is a 32-bit set-and-forget
timer that starts counting after the EPIT is enabled by software. It is capable
of providing precise interrupts at regular intervals with minimal processor
intervention. It has a 12-bit prescaler to adjust the input clock frequency to
the required time setting for the interrupts, and the counter value can be
programmed on the fly.
ESAI provides a full-duplex serial port for serial communication with a variety
of serial devices, including industry-standard codecs, SPDIF transceivers,
and other DSPs. The ESAI consists of independent transmitter and receiver
sections, each section with its own clock generator.
The features of the eSDHC module, when serving as host, include the
following:
The Ethernet Media Access Controller (MAC) is designed to support both 10-
and 100-Mbps Ethernet networks compliant with IEEE 802.3 ® standard. An
external transceiver interface and transceiver function are required to
complete the interface to the media
The Controller Area Network (CAN) protocol is primarily designed to be used
as a vehicle serial data bus running at 1 MBps.
Used for general purpose input/output to external ICs. Each GPIO module
supports 32 bits of I/O.
Each GPT is a 32-bit free-running or set-and-forget mode timer with
programmable prescaler and compare and capture register. A timer counter
value can be captured using an external event and can be configured to
trigger a capture event on either the leading or trailing edges of an input
pulse. When the timer is configured to operate in set-and-forget mode, it is
capable of providing precise interrupts at regular intervals with minimal
processor intervention. The counter has output compare logic to provide the
status and interrupt at comparison. This timer can be configured to run either
on an external clock or on an internal clock.
• Conforms to the SD host controller standard specification version 2.0
• Compatible with the JEDEC MMC system specification version 4.2
• Compatible with the SD memory card specification version 2.0
• Compatible with the SDIO specification version 1.2
• Designed to work with SD memory, miniSD memory, SDIO, miniSDIO, SD
• Configurable to work in one of the following modes:
• Full-/high-speed mode
• Host clock frequency variable between 32 kHz and 52 MHz
• Up to 200-Mbps data transfer for SD/SDIO cards using four parallel data
• Up to 416-Mbps data transfer for MMC cards using eight parallel data lines
combo, MMC and MMC RS cards
lines
—SD/SDIO 1-bit, 4-bit
—MMC 1-bit, 4-bit, 8-bit
Brief Description
7