IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 47

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

To meet PIO write mode timing requirements, a number of timing parameters must be controlled.
shows timing parameters and their determining relations, and indicates parameters that can be adjusted to
meet required conditions.
1
3.7.2.2
Figure 13
Freescale Semiconductor
Parameter
See
ATA
tA
—
—
t1
t2
t9
t3
t4
t0
Figure
and
Mode Timing
12.
Parameter
Multiword DMA (MDMA) Mode Timing
PIO Write
Figure 14
t2w
—
tA
—
—
—
t1
t9
t4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
1
READ Data(15:0)
t1(min.) = time_1 × T – (tskew1 + tskew2 + tskew5)
t2(min.) = time_2w × T – (tskew1 + tskew2 + tskew5)
t9(min.) = time_9 × T – (tskew1 + tskew2 + tskew6)
t3(min.) = (time_2w – time_on) × T – (tskew1 + tskew2 +tskew5)
t4(min.) = time_4 × T – tskew1
tA = (1.5 + time_ax) × T – (tco + tsui + tcable2 + tcable2 + 2 × tbuf)
t0(min.) = (time_1 + time_2 + time_9) × T
Avoid bus contention when switching buffer on by making ton long
enough
Avoid bus contention when switching buffer off by making toff long
enough
show the timing for MDMA read and write modes, respectively.
ADDR
(See note 1)
Table 37. Timing Parameters for PIO Write Mode
DMACK
DMARQ
DIOR
Figure 13. MDMA Read Mode Timing
tm
te
tgr
td
Relation
tk
tfr
tk1
tkjn
if not met, increase time_2w
Adjustable Parameter(s)
time_1, time_2r, time_9
time_2w
time_ax
time_9
time_4
time_1
—
—
Table 37
47