IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 53

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.7.4.1
Figure 20
parameters (P1–P7) shown in the figures. A frame starts with a rising/falling edge on VSYNC, then
HSYNC is asserted and holds for the entire line. The pixel clock is valid as long as HSYNC is asserted.
Freescale Semiconductor
Figure 20. CSI Gated Clock Mode—Sensor Data at Falling Edge, Latch Data at Rising Edge
Figure 21. CSI Gated Clock Mode—Sensor Data at Rising Edge, Latch Data at Falling Edge
and
Gated Clock Mode Timing
Figure 21
DATA[15:0]
PIXCLK
VSYNC
HSYNC
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
DATA[15:0]
PIXCLK
VSYNC
HSYNC
shows the gated clock mode timings for CSI, and
P1
P1
P3
P2
P3
P2
P4
P4
P5
P7
P6
P6
P7
P5
Table 41
describes the timing
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