IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 52

• Manufacturer Part Number: IAR-KSK-IMX25
• Description: KIT DEVELOPMENT I.MX257, ARM926
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r
• Type: MCUr

Specifications of IAR-KSK-IMX25

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: I.MX257
• Processor Series: i.MX25
• Data Bus Width: 16 bit
• Interface Type: UART, JTAG, USB, Ethernet, SD/MMC
• Core: ARM926EJ-S
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: ARM9
• Silicon Core Number: I.MX2
• Silicon Family Name: I.MX25
• Mcu Supported Families: I.MX25
• For Use With/related Products: i.MX25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing parameters for UDMA out-bursts are listed in
3.7.3
The AUDMUX provides a programmable interconnect logic for voice, audio, and data routing between
internal serial interfaces (SSI and SAP) and external serial interfaces (audio and voice codecs). The AC
timing of AUDMUX external pins is governed by the SSI modules. For more information, see
Section 3.7.17, “Synchronous Serial Interface (SSI)
3.7.4
The CSI enables the chip to connect directly to external CMOS image sensors, which are classified as
dumb or smart as follows:
The following subsections describe the CSI timing in gated and ungated clock modes.
52
Parameter
•
•
t2cyc
ATA
tdvh
trfs1
tack
tenv
tdvs
tcyc
tcvh
tmli
tss
—
—
tli
tli
tli
Dumb sensors only support traditional sensor timing (vertical sync (VSYNC) and horizontal sync
(HSYNC)) and output-only Bayer and statistics data.
Smart sensors support CCIR656 video decoder formats and perform additional processing of the
image (for example, image compression, image pre-filtering, and various data output formats).
Digital Audio Mux (AUDMUX) Timing
CMOS Sensor Interface (CSI) Timing
Parameter
tdzfs_mli
Spec
tdzfs
tdvh
tack
tenv
tdvs
tcyc
tcvh
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
trfs
ton
toff
tss
tli1
tli2
tli3
—
tack(min.) = (time_ack × T) – (tskew1 + tskew2)
tenv(min.) = (time_env × T) – (tskew1 + tskew2)
tenv(max.) = (time_env × T) + (tskew1 + tskew2)
tdvs = (time_dvs × T) – (tskew1 + tskew2)
tdvs = (time_dvh × T) – (tskew1 + tskew2)
tcyc = time_cyc × T – (tskew1 + tskew2)
t2cyc = time_cyc × 2 × T
trfs = 1.6 × T + tsui + tco + tbuf + tbuf
tdzfs = time_dzfs × T – (tskew1)
tss = time_ss × T – (tskew1 + tskew2)
tdzfs_mli =max.(time_dzfs, time_mli) × T – (tskew1 + tskew2)
tli1 > 0
tli2 > 0
tli3 > 0
tcvh = (time_cvh × T) – (tskew1 + tskew2)
ton = time_on × T – tskew1
toff = time_off × T – tskew1
Table 40. Timing Parameters UDMA Out-Bursts
Timing.”
Value
Table
40.
Freescale Semiconductor
How to Meet?
time_dzfs
time_ack
time_env
time_dvs
time_dvh
time_cvh
time_cyc
time_cyc
time_ss
—
—
—
—
—
—