IAR-KSK-IMX25 Freescale Semiconductor, IAR-KSK-IMX25 Datasheet - Page 40
![KIT DEVELOPMENT I.MX257, ARM926](/photos/37/58/375862/imx25kbsbd_sml.jpg)
IAR-KSK-IMX25
Manufacturer Part Number
IAR-KSK-IMX25
Description
KIT DEVELOPMENT I.MX257, ARM926
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Type
MCUr
Datasheets
1.MCIMX25WPDKJ.pdf
(2 pages)
2.IAR-KSK-IMX25.pdf
(154 pages)
3.IAR-KSK-IMX25.pdf
(2 pages)
4.IAR-KSK-IMX25.pdf
(57 pages)
Specifications of IAR-KSK-IMX25
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
I.MX257
Processor Series
i.MX25
Data Bus Width
16 bit
Interface Type
UART, JTAG, USB, Ethernet, SD/MMC
Core
ARM926EJ-S
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
I.MX2
Silicon Family Name
I.MX25
Mcu Supported Families
I.MX25
For Use With/related Products
i.MX25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCIMX25WPDKJ PDF datasheet
- IAR-KSK-IMX25 PDF datasheet #2
- IAR-KSK-IMX25 PDF datasheet #3
- IAR-KSK-IMX25 PDF datasheet #4
- Current page: 40 of 154
- Download datasheet (2Mb)
Note:
1. Maximum condition for tpr, tpo, tpi, and tpv: wcs model, 1.1 V, I/O 3.0 V, and 105 °C. Minimum condition for tpr, tpo, and tpv:
2. Minimum condition for tps: wcs model, 1.1 V, I/O 3.0 V, and 105 °C. tps is measured between VIL to VIH for rising edge and
3. Maximum condition for tdit: bcs model, 1.3 V, I/O 3.6 V, and –40 °C.
4. Maximum condition for tpi and trfi: wcs model, 1.1 V, I/O 3.0 V and 105 °C. Minimum condition for tpi and trfi: bcs model, 1.3 V,
3.6.3.3
Table 29
40
Output pad dI/dt (max. drive)
Output pad dI/dt (high drive)
Output pad dI/dt (standard drive)
Input pad transition times
Input pad propagation delay, 50%–50%
Input pad propagation delay, 40%–60%
Duty cycle
Clock frequency
Output pad transition times
Output pad propagation delay, 50%–50%
Output pad propagation delay, 40%–60%
Output enable to output valid delay,
50%–50%
Output enable to output valid delay,
40%–60%
Output pad slew rate
bcs model, 1.3 V, I/O 3.6 V and –40 °C. Input transition time from core is 1 ns (20%–80%).
between VIH to VIL for falling edge.
I/O 3.6 V and –40 °C. Input transition time from pad is 5 ns (20%–80%).
shows AC parameters for DDR2 I/O.
DDR_TYPE = 10 Max Setting I/O AC Parameters and Requirements
Parameter
Parameter
Table 28. AC Parameters for SDRAM pbijtov18_33_ddr_clk I/O (continued)
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Table 29. AC Parameters for DDR2 I/O
Symbol
Symbol
Fduty
tdit
tdit
tdit
tpo
tpo
tpv
tpv
tps
trfi
tpr
tpi
tpi
f
Condition
Condition
1.0 pF
1.0 pF
25 pF
25 pF
25 pF
50 pF
50 pF
50 pF
25 pF
50 pF
25 pF
50 pF
25 pF
50 pF
25 pF
50 pF
25 pF
50 pF
25 pF
50 pF
Load
Load
—
—
0.07/0.08
0.56/0.69
1.38/1.51
Rise/Fall
Rise/Fall
0.53/0.52
1.01/0.98
0.93/1.25
1.26/1.54
1.01/1.17
1.27/1.53
1.30/1.19
1.62/1.54
1.39/1.27
1.64/1.55
0.86/0.98
0.46/054
Min.
Min.
89
95
60
63
29
31
40
—
0.11/0.12 0.16/0.20
0.87/1.08 1.37/1.62
1.68/1.89 2.18/2.42
0.80/0.72
1.49/1.34
1.56/1.70
2.07/2.19
1.60/1.75
2.00/2.14
2.17/1.81
2.56/2.29
2.13/1.86
2.62/2.23
0.72/0.81
1.35/1.5
Typ.
Typ.
202
213
135
142
67
70
50
—
Rise/Fall
1.19/1.04
2.21/1.90
2.52/2.53
3.29/3.24
2.49/2.52
3.11/3.10
3.35/2.84
3.35/2.54
3.38/2.83
4.14/2.38
2.15/2.19
1.12/1.16
Rise/Fall
Max.
Max.
435
456
288
302
144
150
133
60
Freescale Semiconductor
mA/ns
mA/ns
mA/ns
Units
Units
MHz
V/ns
ns
ns
ns
ns
ns
ns
ns
%
Notes
Notes
—
—
3
4
1
1
1
1
1
2
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