XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 47

• Manufacturer Part Number: XC56309VL100A
• Description: IC DSP 24BIT 100MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of XC56309VL100A

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 102KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.2 X Data Memory Space
The X data memory space consists of the following:
Note:
3.2.1 Internal X Data Memory
The default internal X data RAM is a 24-bit-wide, internal, static memory occupying the lowest
7 K locations ($00000–$01BFF) in X memory space. The internal X data RAM is organized into
28 banks with 256 locations each. Available X data memory space is decreased by 2 K through
reallocation to program memory using the memory switch mode described in the next section.
3.2.2 Memory Switch Modes—X Data Memory
Memory switch mode reallocates portions of X and Y data memory to program RAM. Bit 7 in the
OMR is the MS bit that controls this function, as follows:
3.2.3 Internal I/O Space—X Data Memory
One part of the internal peripheral registers and some of the DSP56309 core registers occupy the
top 128 locations of the X data memory ($FFFF80–$FFFFFF). This area is referred to as the
internal X I/O space and it can be accessed by move, movep instructions and by bit-oriented
instructions (bchg, bclr, bset, btst, brclr, brset, bsclr, bsset, jclr, jset, jsclr, and jsset). The
contents of the internal X I/O memory space are listed in Appendix A, Bootstrap Program.
Freescale Semiconductor
Internal X data memory (7 K by default or 5 K)
Internal I/O space (upper 128 locations)
Optional off-chip memory expansion (up to 64 K in 16-bit mode, or 256 K in 24-bit mode
using the 18 external address lines, or 4 M using the external address lines and the four
address attribute lines). Refer to the DSP56300 Family Manual, especially Chapter 9,
External Memory Interface (Port A), for details on using the external memory interface to
access external X data memory.
When the MS bit is cleared, the X data memory consists of the default 7 K × 24-bit
memory space described in the previous section. In this default mode, the lowest external
X data memory location is $1C00.
When the MS bit is set, a portion of the higher locations of the X and Y data memory is
switched to internal program memory. The X data memory in this mode consists of a
5 K × 24-bit memory space. In this mode, the lowest external X data memory location is
$1400.
The X memory space at $FF0000–$FFEFFF is reserved and should not be accessed.
DSP56309 User’s Manual, Rev. 1
X Data Memory Space
3-3