XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 248

IC DSP 24BIT 100MHZ 196-MAPBGA

XC56309VL100A

Manufacturer Part Number
XC56309VL100A
Description
IC DSP 24BIT 100MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of XC56309VL100A

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56309VL100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
XC56309VL100AR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Programming Reference
B-14
Application:
Bus Control Register (BCR)
Reset = $1FFFFF
BRH
NOTE: All BCR bits are read/write control bits.
23 22 21 20
Bus Request Hold, Bit 23
0 = BR pin is asserted only for attempted
1 = BR pin is always asserted
Bus Interface Unit
or pending access
*
0
BBS
Bus State, Bit 21
0 = DSP is not bus master
1 = DSP is bus master
19 18 17 16
BDFW[4–0]
Figure B-5. Bus Control Register (BCR)
15 14 13 12 11 10 9
DSP56309 User’s Manual, Rev. 1
BA3W[2–0]
X:$FFFFFB Read/Write
BA2W[2–0]
8
BA1W[4–0]
Default Area Wait Control, Bits 20–16
Area 3 Wait Control, Bits 15–13
Area 2 Wait Control, Bits 12–10
Area 0 Wait Control, Bits 4– 0
These read/write control bits define
the number of wait states inserted
into each external SRAM access to
the designated area. The value of
these bits should not be programmed
as zero.
Area 1 Wait Control, Bits 9–5
7
20–16
15–13
12–10
Bits
*
9–5
4–0
Date:
Programmer:
6
= Reserved, Program as 0
5
BDFW[4–0]
BA3W[2–0]
BA2W[2–0]
BA1W[4–0]
BA0W[4–0]
Bit Name
4
3
Freescale Semiconductor
BA0W[4–0]
# of Wait States
Sheet 1 of 2
2
0–31
0–31
0–31
0–7
0–7
1
0

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