XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 20

IC DSP 24BIT 100MHZ 196-MAPBGA

XC56309VL100A

Manufacturer Part Number
XC56309VL100A
Description
IC DSP 24BIT 100MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of XC56309VL100A

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56309VL100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
XC56309VL100AR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
DSP56309 Overview
1.7 Internal Buses
To provide data exchange between the blocks, the DSP56309 implements the following buses:
The block diagram in Figure 1-1 illustrates these buses among other components. All internal
buses on the DSP56300 family members are 24-bit buses. The program data bus is also a 24-bit
bus.
1-10
Peripheral I/O expansion bus to peripherals
Program memory expansion bus to program ROM
X memory expansion bus to X memory
Y memory expansion bus to Y memory
Global data bus between PCU and other core structures
Program data bus for carrying program data throughout the core
X memory data bus for carrying X data throughout the core
Y memory data bus for carrying Y data throughout the core
Program address bus for carrying program memory addresses throughout the core
X memory address bus for carrying X memory addresses throughout the core
Y memory address bus for carrying Y memory addresses throughout the core.
DSP56309 User’s Manual, Rev. 1
Freescale Semiconductor

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