HD6417020SVX12I Renesas Electronics America, HD6417020SVX12I Datasheet - Page 310

IC SUPERH MPU ROMLESS 100TQFP

HD6417020SVX12I

Manufacturer Part Number
HD6417020SVX12I
Description
IC SUPERH MPU ROMLESS 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SVX12I

Core Processor
SH-1
Core Size
32-Bit
Speed
12.5MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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10.6.8
If an input capture signal is generated during the T3 state of a general register write cycle, the
input capture transfer takes priority and the write to the GR is not performed. The timing is shown
in figure 10.65.
10.6.9
When a counter is cleared by compare match, the counter is cleared in the last state in which the
TCNT value matches the GR value (when the TCNT is updated from the matching count to the
next count). The actual counter frequency is therefore given by the following formula:
292 RENESAS
Figure 10.65 Contention between General Register Write and Input Capture
f = /(N + 1)
(f: counter frequency. : operating frequency. N: value set in the GR.)
Contention between General Register Write and Input Capture
Note on Waveform Cycle Setting
Input capture
write signal
Address
Internal
TCNT
signal
GR
CK
T1
GR write cycle
GR address
T2
M
T3
M

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