HD6417020SVX12I Renesas Electronics America, HD6417020SVX12I Datasheet - Page 117

• Manufacturer Part Number: HD6417020SVX12I
• Description: IC SUPERH MPU ROMLESS 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SVX12I

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 12.5MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

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See table 8.6 in section 8.3, Address Space Subdivision, for more information on how the space is
divided.
8.2
8.2.1
The bus control register (BCR) is a 16-bit read/write register that selects the functions of areas and
status of bus cycles. It is initialized to H'0000 by a power-on reset, but is not initialized by a
manual reset or by the standby mode.
•
Bit 15: DRAME
0
1
•
On-chip ROM space in area 0: Always 32 bits
External memory space in area 0: 8 bits when MD0 pin is 0, 16 bits when the pin is 1
On-chip peripheral module space in area 5: 8 bits when the A8 address bit is 0, 16 bits when it
is 1
Area 6: If A27 = 0, area 6 is 8 bits when the A14 address bit is 0, 16 bits when A14 is 1
On-chip RAM space in area 7: Always 32 bits
Bit 15 (DRAM enable bit (DRAME)): DRAME selects whether area 1 is used as an external
memory space or DRAM space. 0 sets it for external memory space and 1 sets it for DRAM
space. The setting of the DRAM area control register is valid only when this bit is set to 1.
Bit 14 (multiplexed I/O enable bit (IOE)): IOE selects whether area 6 is used as external
memory space or an address/data multiplexed I/O area. 0 sets it for external memory space and
1 sets it for address/data multiplexed I/O space. With address/data multiplexed I/O space,
address and data are multiplexed and input/output is from AD15–AD0.
Initial value:
Initial value:
Bit name: DRAME
Bit name:
Register Descriptions
Bus Control Register (BCR)
R/W:
R/W:
Bit:
Bit:
R/W
15
—
—
0
7
0
Description
Area 1 is external memory space (initial value)
Area 1 is a DRAM space
R/W
IOE
14
—
—
0
6
0
WARP
R/W
13
—
—
0
5
0
RDDTY
R/W
12
—
—
0
4
0
BAS
R/W
11
—
—
0
3
0
10
—
—
—
—
0
2
0
—
—
—
—
9
0
1
0
RENESAS 97
—
—
—
—
8
0
0
0