UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 635

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address F0043H
Address F0047H
Address F0053H
Address F0057H
(16) Port input mode registers 3, 7 (PIM3, PIM7)
(17) Port output mode registers 3, 7 (POM3, POM7)
Symbol
Symbol
Symbol
Symbol
POM3
POM7
PIM3
PIM7
Notes
Notes
These registers set the input buffer of ports 3 and 7 in 1-bit units.
PIM3 and PIM7 registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears PIM3 and PIM7 registers to 00H.
These registers set the output mode of ports 3 and 7 in 1-bit units.
POM3 and POM7 registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears POM3 and POM7 registers to 00H.
POMmn
PIMmn
1.
2.
1.
2.
Figure 13-20. Format of Port Output Mode Registers 3 and 7 (POM3 and POM7)
Figure 13-19. Format of Port Input Mode Registers 3 and 7 (PIM3 and PIM7)
0
1
0
1
7
7
7
7
0
0
0
0
After reset: 00H
After reset: 00H
After reset: 00H
After reset: 00H
PIM7 register is not provided in the 78K0R/IB3.
PIM71, PIM74, and PIM75 registers are not provided in the 38-pin products of the 78K0R/IC3.
POM7 register is not provided in the 78K0R/IB3.
POM70, POM72, and POM75 registers are not provided in
78K0R/IC3.
Normal input buffer
TTL input buffer
Normal output mode
N-ch open-drain output (V
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
POM75
CHAPTER 13 SERIAL ARRAY UNIT
PIM75
5
0
5
5
0
5
User’s Manual U19678EJ1V1UD
Note 2
Pmn pin output buffer selection (m = 3, 7; n = 0 to 3, 5)
Note 2
Pmn pin input buffer selection (m = 3, 7; n = 1, 2, 4, 5)
DD
tolerance) mode
Note 1
PIM74
Note 1
4
0
4
4
0
4
0
Note 2
POM73
3
0
3
0
3
0
3
POM72
POM32
PIM32
PIM72
2
2
2
2
Note 2
the 38-pin products of the
PIM71
POM31
PIM31
1
1
1
1
0
Note 2
POM70
POM30
0
0
0
0
0
0
Note 2
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