UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 265

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note
Before Change
Subsystem
clock
40 MHz
internal high-
speed
oscillation
clock
Note
The 78K0R/IB3 doesn’t have the subsystem clock.
CPU Clock
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
40 MHz internal
high-speed
oscillation clock
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
Subsystem
clock
After Change
Note
• SELDSC = 0, DSPO = 0
Transition cannot be performed unless the
clock is changed to the internal high-
speed oscillation clock once.
Transition cannot be performed unless the
clock is changed to the internal high-
speed oscillation clock once.
Transition cannot be performed unless the
clock is changed to the internal high-
speed oscillation clock once.
Oscillation of internal high-speed oscillator
and selection of internal high-speed
oscillation clock as main system clock
• HIOSTOP = 0, MCS = 0
Stabilization of X1 oscillation and
selection of high-speed system clock as
main system clock
• OSCSEL = 1, EXCLK = 0, MSTOP = 0
• After elapse of oscillation stabilization time
• MCS = 1
Enabling input of external clock from
EXCLK pin and selection of high-speed
system clock as main system clock
• OSCSEL = 1, EXCLK = 1, MSTOP = 0
• MCS = 1
Transition cannot be performed unless
the clock is changed to the internal high-
speed oscillation clock once.
(Set when changing the clock.)
Table 5-6. Changing CPU Clock (2/2)
CHAPTER 5 CLOCK GENERATOR
Condition Before Change
User’s Manual U19678EJ1V1UD
XT1 oscillation can be stopped
(XTSTOP = 1)
40 MHz internal high-speed oscillation
clock can be stopped (DSCON = 0)
Processing After Change
−
−
−
−
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