UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 461

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.5.11 Operation as linked real-time output function (type 2)
channel 0 thinned the specified number of times as INTTMn of slave channel 1. By using this function, the TROm
value of slave channels 2 to 7 (the real-time output channels) can be output from TOm synchronized with INTTMn (a
signal that is INTTM00 of the master channel thinned the specified number of times).
specified number of times from the slave channel is used as the real-time output trigger. The real-time output channel
of slave channels 2 to 7 outputs the set value of TROm from TOm by the real-time output trigger.
time, INTTM00 is output by setting MD000 of TMR00 to “1”.
TDR00 again at the same timing. Similar operation is continued hereafter.
thinning control has been performed, is output by using INTTM00 of the master channel as the count clock and by
performing an operation in event counter mode. TCRn loads the value of TDRn by setting the channel start trigger bit
(TSn) to 1. TCRn counts down along with the INTTM00 output of the master channel, and loads the value of TDRn
again and outputs INTTMn when TCRn becomes 0000H. Similar operation is continued hereafter. The setting values
of TROn and TROm are output from TOn and TOm at the INTTMn output timing of slave channel 1.
TRCm bits.
outputs the setting value of TROm at the INTTMn output timing of slave channel 1. In the lower channel, TOm does
not output the set value of TROm at the INTTMn output timing of the real-time output trigger generation channel when
TREm = 0 or TRCm = 1. When this function is used, TCRm, TDRm, and INTTMm of the lower channel can be
operated as different functions.
The linked real-time output function (type 2) includes a function to output a signal that is INTTM00 of master
If TRCn of the slave channel 1 is set to 1, INTTMn that is INTTM00 of the master channel being thinned by the
The number of interrupts to be thinned can be calculated by the following expression.
The master channel operates in the interval timer mode and counts the periods.
TCR00 loads the value of TDR00 at the first count clock, after the channel start trigger bit (TS00) is set to 1. At this
Afterward, TCR00 counts down along with the count clock.
When TCR00 has become 0000H, INTTM00 is output upon the next count clock. TCR00 loads the value of
Slave channel 1 generates a real-time output trigger. INTTMn, which is INTTM00 of the master channel on which
TOm of the lower channel (slave channels 2 to 7) of the slave channel 1 (TRCn = 1) is controlled by the TREm and
When TREm of the lower channel (TRCm = 0) is “1”, the channel operates as a real-time output channel and TOm
TDR00 of the master channel becomes valid from the next start timing (master channel INTTM00 generation).
TDRn of the slave channel 1 becomes valid from the next start timing (slave channel 1 INTTMn generation).
Caution
Remark
Number of interrupts to be thinned = Set value of TDRn (slave channel 1)
→ Outputting INTTM00 of the master channel from INTTMn of the slave channel every {Set value of TDRn
(slave 1) + 1} times
m = 02 to 07
n = 01
TS00 or TSn cannot be set to “1” (forcible restart) while TE00 = 1 or TEn = 1. If TS00 or TSn is set
to “1” while TE00 = 1 or TEn = 1, the counter value (TCR00 or TCRn) will be illegal and TOm will
not be able to output the expected waveform.
CHAPTER 7 INVERTER CONTROL FUNCTIONS
User’s Manual U19678EJ1V1UD
459