UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 16

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 14 SERIAL INTERFACE IICA ........................................................................................... 760
14
13.4 Operation stop mode ............................................................................................................... 637
13.5 Operation of 3-Wire Serial I/O (CSI00, CSI01, CSI10) Communication ............................... 639
13.6 Operation of UART (UART0, UART1) Communication ......................................................... 699
13.7 Operation of Simplified I
13.8 Relationship Between Register Settings and Pins ............................................................... 753
14.1 Functions of Serial Interface IICA........................................................................................... 760
14.2 Configuration of Serial Interface IICA .................................................................................... 763
14.3 Registers Controlling Serial Interface IICA............................................................................ 766
14.4 I
2
13.4.1 Stopping the operation by units.....................................................................................................638
13.4.2 Stopping the operation by channels ..............................................................................................639
13.5.1 Master transmission ......................................................................................................................640
13.5.2 Master reception ...........................................................................................................................650
13.5.3 Master transmission/reception ......................................................................................................660
13.5.4 Slave transmission ........................................................................................................................670
13.5.5 Slave reception .............................................................................................................................680
13.5.6 Slave transmission/reception ........................................................................................................687
13.5.7 Calculating transfer clock frequency..............................................................................................698
13.5.8 Procedure for processing errors that occurred during 3-wire serial I/O (CSI00, CSI01, CSI10)
13.6.1 UART transmission .......................................................................................................................700
13.6.2 UART reception.............................................................................................................................710
13.6.3 LIN transmission ...........................................................................................................................717
13.6.4 LIN reception.................................................................................................................................720
13.6.5 Calculating baud rate ....................................................................................................................727
13.6.6 Procedure for processing errors that occurred during UART (UART0, UART1) communication...731
13.7.1 Address field transmission ............................................................................................................733
13.7.2 Data transmission..........................................................................................................................739
13.7.3 Data reception...............................................................................................................................743
13.7.4 Stop condition generation..............................................................................................................748
13.7.5 Calculating transfer rate ................................................................................................................749
13.7.6 Procedure for processing errors that occurred during simplified I
13.8.1 Relationship Between Register Settings and Pins of Channel 0 ...................................................753
13.8.2 Relationship Between Register Settings and Pins of Channel 1 ...................................................755
13.8.3 Relationship Between Register Settings and Pins of Channel 2 ...................................................757
13.8.4 Relationship Between Register Settings and Pins of Channel 3 ...................................................760
14.4.1 Pin configuration ...........................................................................................................................780
14.4.2 Setting transfer clock by using IICWL and IICWH registers ..........................................................781
C Bus Mode Functions .......................................................................................................... 780
communication..............................................................................................................................700
2
C (IIC10) Communication.............................................................. 732
User’s Manual U19678EJ1V1UD
2
C (IIC10) communication.........752