D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 557

IC H8S MCU ROMLESS 100-QFP

D12312SVTEBL25

Manufacturer Part Number
D12312SVTEBL25
Description
IC H8S MCU ROMLESS 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12312SVTEBL25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTEBL25
HD6412312SVTEBL25
Interrupt Operation (Except Block Transfer Mode): There are three interrupt sources in smart
card interface mode: transmit-data-empty interrupt (TXI) requests, transmit/receive-error interrupt
(ERI) requests, and receive-data-full interrupt (RXI) requests. The transmit-end interrupt (TEI)
request is not used in this mode.
When the TEND flag in SSR is set to 1, a TXI interrupt request is generated.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated.
When any of flags ORER, PER, and ERS in SSR is set to 1, an ERI interrupt request is generated.
The relationship between the operating states and interrupt sources is shown in table 13.8.
Note: For details of operation in block transfer mode, see section 12.4, SCI Interrupts.
Table 13.8 Smart Card Mode Operating States and Interrupt Sources
Operating State
Transmit
Mode
Receive
Mode
SCK
Normal
operation
Error
Normal
operation
Error
Figure 13.8 Timing for Fixing Clock Output
Specified pulse width
SCR write
(CKE0 = 0)
Flag
TEND
ERS
RDRF
PER, ORER
Enable Bit
TIE
RIE
RIE
RIE
Rev.7.00 Feb. 14, 2007 page 523 of 1108
SCR write
(CKE0 = 1)
Specified pulse width
Section 13 Smart Card Interface
Interrupt
Source
TXI
ERI
RXI
ERI
REJ09B0089-0700
DTC
Activation
Possible
Possible
Not possible
Not possible

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