MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 454

IC MCU 256K FLASH 112-LQFP

MC9S12XA256CAL

Manufacturer Part Number
MC9S12XA256CAL
Description
IC MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12XA256CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
80MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 16 Channel)
Package
112LQFP
Family Name
HCS12
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
10.3.3.3
This register keeps the data length field of the CAN frame.
454
Module Base + 0x0004 (DSR0)
DLC[3:0]
DB[7:0]
Field
Field
7:0
3:0
Reset:
Reset:
W
R
W
Figure 10-34. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
R
Data bits 7:0
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 10-33
Data Length Register (DLR)
0x0005 (DSR1)
0x0006 (DSR2)
0x0007 (DSR3)
0x0008 (DSR4)
0x0009 (DSR5)
0x000A (DSR6)
0x000B (DSR7)
Figure 10-35. Data Length Register (DLR) — Extended Identifier Mapping
x
7
DB7
7
x
shows the effect of setting the DLC bits.
= Unused; always read “x”
Table 10-31. DSR0–DSR7 Register Field Descriptions
6
x
DB6
6
x
Table 10-32. DLR Register Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
5
x
DB5
x
5
4
x
DB4
Description
Description
x
4
DLC3
3
x
DB3
x
3
DLC2
x
DB2
2
x
2
Freescale Semiconductor
DLC1
x
DB1
1
1
x
DLC0
x
DB0
0
0
x

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