MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 1159

• Manufacturer Part Number: MC9S12XA256CAL
• Description: IC MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XA256CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XA
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 16 Channel)
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

28.3.2.5.1
The general guideline is that Flash protection can only be added and not removed.
all valid transitions between Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored and the FPROT register will remain unchanged. The contents of the
FPROT register reflect the active protection scenario. See the FPHS and FPLS descriptions for additional
restrictions.
28.3.2.6
The FSTAT register defines the operational status of the module.
Freescale Semiconductor
Reset
Reset
W
W
R
R
CBEIF
CBEIF
1 Allowed transitions marked with X.
Flash Status Register (FSTAT)
Protection Scenario
1
1
7
7
Flash Protection Restrictions
From
= Unimplemented or Reserved
= Unimplemented or Reserved
0
1
2
3
4
5
6
7
Figure 28-12. Flash Status Register (FSTAT — Normal Mode)
Figure 28-13. Flash Status Register (FSTAT — Special Mode)
CCIF
CCIF
1
1
6
6
Table 28-13. Flash Protection Scenario Transitions
X
X
MC9S12XDP512 Data Sheet, Rev. 2.21
0
PVIOL
PVIOL
0
0
5
5
1
X
X
X
X
ACCERR
ACCERR
0
0
4
4
X
X
X
X
2
To Protection Scenario
3
X
X
X
X
X
X
X
X
Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
0
0
0
0
3
3
X
X
X
X
4
BLANK
BLANK
1
X
X
5
0
0
2
2
X
X
6
Table 28-13
FAIL
0
0
0
1
1
X
7
specifies
0
0
0
0
0
0
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