MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 349

• Manufacturer Part Number: MC9S12XA256CAL
• Description: IC MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XA256CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XA
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 16 Channel)
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3.2.31
Freescale Semiconductor
Reset
Reset
Reset
Reset
Reset
Reset
W
W
W
W
W
W
R
R
R
R
R
R
TC15
TC15
TC15
TC7
TC7
TC7
Timer Input Capture Holding Registers 0–3 (TCxH)
15
15
15
0
0
0
0
0
0
7
7
7
Figure 7-57. Timer Input Capture Holding Register 0 High (TC0H)
Figure 7-59. Timer Input Capture Holding Register 1 High (TC1H)
Figure 7-61. Timer Input Capture Holding Register 2 High (TC2H)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 7-58. Timer Input Capture Holding Register 0 Low (TC0H)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 7-60. Timer Input Capture Holding Register 1 Low (TC1H)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 7-62. Timer Input Capture Holding Register 2 Low (TC2H)
TC14
TC14
TC14
TC6
TC6
TC6
14
14
14
0
0
0
0
0
0
6
6
6
MC9S12XDP512 Data Sheet, Rev. 2.21
TC13
TC13
TC13
TC5
TC5
TC5
13
13
13
0
0
0
0
0
0
5
5
5
TC12
TC12
TC12
TC4
TC4
TC4
12
12
12
0
0
0
0
0
0
4
4
4
TC11
TC11
TC11
TC3
TC3
TC3
11
11
11
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
0
0
0
0
0
0
3
3
3
TC10
TC10
TC10
TC2
TC2
TC2
10
10
10
0
0
0
0
0
0
2
2
2
TC9
TC1
TC9
TC1
TC9
TC1
0
0
0
0
0
0
9
1
9
1
9
1
TC8
TC0
TC8
TC0
TC8
TC0
0
0
0
0
0
0
8
0
8
0
8
0
349