P89V662FBC,557 NXP Semiconductors, P89V662FBC,557 Datasheet - Page 71

• Manufacturer Part Number: P89V662FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V662FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2435; 935280832557; P89V662FBC

NXP Semiconductors
7. Limiting values
Table 69.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
otherwise noted.
8. Static characteristics
Table 70.
T
P89V660_662_664_3
Product data sheet
Symbol
T
T
V
V
I
P
Symbol
n
t
I
V
V
V
V
V
V
I
OL(I/O)
ret(fl)
latch
IL
amb
endu(fl)
amb(bias)
stg
I
n
tot(pack)
th(HL)
IL
th(LH)
IH
OL
OH
= 40 C to +85 C; V
Parameter
endurance of flash memory
flash memory retention time
I/O latch-up current
HIGH-LOW threshold voltage except SCL, SDA
LOW-level input voltage
LOW-HIGH threshold voltage except SCL, SDA, XTAL1,
HIGH-level input voltage
LOW-level output voltage
HIGH-level output voltage
LOW-level input current
Limiting values
Static characteristics
Parameter
bias ambient temperature
storage temperature
input voltage
voltage on any other pin
LOW-level output current per
input/output pin
total power dissipation (per package) based on package heat
DD
= 4.5 V to 5.5 V; V
Conditions
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
SCL, SDA
RST
SCL, SDA
XTAL1, RST
V
ALE, SCL, SDA
V
V
V
V
External Bus mode, ALE,
PSEN
V
DD
DD
DD
DD
DD
I
I
I
I
I
I
= 0.4 V, ports 1, 2, 3, 4
OL
OL
OL
OH
OH
= 4.5 V, except, PSEN,
= 4.5 V, ALE, PSEN
= 4.5 V, SCL, SDA
= 4.5 V, ports 1, 2, 3, 4
= 4.5 V, Port 0 in
Rev. 03 — 10 November 2008
SS
= 1.6 mA
= 3.2 mA
= 3.0 mA
= 30 A
= 3.2 mA
= 0 V
Conditions
on EA pin to V
except V
V
transfer, not device power
consumption
DD
SS
, with respect to
80C51 with 512 B/1 kB/2 kB RAM, dual I
SS
[2][3][4]
[1]
[1]
[1]
[5]
Min
10000
100
100 + I
0.2V
0.7V
0.7V
-
-
-
V
V
0.5
0.5
1
DD
DD
P89V660/662/664
DD
DD
DD
0.7
0.7
Min
-
-
DD
+ 0.9 -
55
65
0.5
0.5
Typ Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.2V
0.3V
V
V
6.0
0.4
0.45
0.4
-
-
Max
+125
+150
14
V
15
1.5
75
DD
DD
© NXP B.V. 2008. All rights reserved.
DD
DD
DD
+ 0.5
+ 0.5
+ 0.5
2
0.1 V
C-bus, SPI
SS
Unit
cycles
years
mA
V
V
V
V
V
V
V
V
V
Unit
V
V
mA
W
71 of 89
unless
C
C
A