P89V662FBC,557 NXP Semiconductors, P89V662FBC,557 Datasheet - Page 40

• Manufacturer Part Number: P89V662FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V662FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2435; 935280832557; P89V662FBC

NXP Semiconductors
P89V660_662_664_3
Product data sheet
6.5.1 Mode 0
Table 28.
Table 29.
Bit addressable; Reset value: 0000 0000B; Reset source(s): any reset
Table 30.
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a fixed divide-by-32 prescaler.
M1
1
1
1
Bit
7
6
5
4
3
2
1
0
Bit
Symbol
TMOD - Timer/Counter mode control register (address 89H) M1/M0 operating
mode
TCON - Timer/Counter control register (address 88H) bit allocation
TCON - Timer/Counter control register (address 88H) bit description
Symbol
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
TF1
M0
0
1
1
7
…continued
Rev. 03 — 10 November 2008
TR1
6
Description
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when the processor vectors to Timer 1 Interrupt
routine, or by software.
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter
1 on/off.
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when the processor vectors to Timer 0 Interrupt
routine, or by software.
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter
0 on/off.
Interrupt 1 Edge flag. Set by hardware when external interrupt 1
edge/LOW-state is detected. Cleared by hardware when the interrupt
is processed, or by software.
Interrupt 1 Type control bit. Set/cleared by software to specify falling
edge/LOW-state that triggers external interrupt 1.
Interrupt 0 Edge flag. Set by hardware when external interrupt 0
edge/LOW-state is detected. Cleared by hardware when the interrupt
is processed, or by software.
Interrupt 0 Type control bit. Set/cleared by software to specify falling
edge/LOW-state that triggers external interrupt 0.
Operating mode
2
3
3
TF0
5
80C51 with 512 B/1 kB/2 kB RAM, dual I
8-bit auto-reload Timer/Counter ‘THx’ holds a value
which is to be reloaded into ‘TLx’ each time it
overflows.
(Timer 0) TL0 is an 8-bit Timer/Counter controlled
by the standard Timer 0 control bits. TH0 is an 8-bit
timer only controlled by Timer 1 control bits.
(Timer 1) Timer/Counter 1 stopped.
TR0
Figure 14
4
P89V660/662/664
IE1
shows Mode 0 operation.
3
IT1
2
© NXP B.V. 2008. All rights reserved.
IE0
1
2
C-bus, SPI
40 of 89
IT0
0