P89V662FBC,557 NXP Semiconductors, P89V662FBC,557 Datasheet - Page 19

• Manufacturer Part Number: P89V662FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V662FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2435; 935280832557; P89V662FBC

NXP Semiconductors
P89V660_662_664_3
Product data sheet
6.3.3 Boot block
6.3.4 Power-on reset code execution
6.3.5 Hardware activation of the bootloader
6.3.6 ISP
6.3.7 Using ISP
When the microcontroller programs its own flash memory, all of the low level details are
handled by code (bootloader) that is contained in a Boot block. A user program calls the
common entry point in the Boot block with appropriate parameters to accomplish the
desired operation. Boot block operations include erase user code, program user code,
program security bits, chip erase, etc. The Boot block logically overlays the program
memory space from FC00H to FFFFH, when it is enabled. The Boot block may be
disabled on-the-fly so that the upper 1 kB of user code is available to the user’s program.
The P89V660/662/664 contains two special flash elements: the Boot Vector and the Boot
Status bit. Following reset, the P89V660/662/664 examines the contents of the Boot
Status bit. If the Boot Status bit is set to zero, power-up execution starts at location 0000H,
which is the normal start address of the user’s application code. When the Boot Status bit
is set to a value other than zero, the contents of the Boot Vector are used as the high byte
of the execution address and the low byte is set to 00H
Table 10
bootloader is pre-programmed into the address space indicated and uses the indicated
boot loader entry point to perform ISP functions.
Table 10.
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence. This has the same effect as having a non-zero status byte. This
allows an application to be built that will normally execute user code but can be manually
forced into ISP operation. If the factory default setting for the boot vector (FCH) is
changed, it will no longer point to the factory pre-programmed ISP bootloader code. After
programming the flash, the status byte should be programmed to zero in order to allow
execution of the user’s application code beginning at address 0000H.
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89V660/662/664 through the serial port. This
firmware is provided by NXP and embedded within each P89V660/662/664 device. The
NXP ISP facility has made in-circuit programming in an embedded application possible
with a minimum of additional expense in components and circuit board area. The ISP
function uses five pins (V
be available to interface your application to an external circuit in order to use this feature.
The ISP feature allows for a wide range of baud rates to be used in your application,
independent of the oscillator frequency. It is also adaptable to a wide range of oscillator
frequencies. This is accomplished by measuring the bit-time of a single bit in a received
character. This information is then used to program the baud rate in terms of timer counts
Device
P89V660/662/664
shows the factory default Boot Vector setting for this device. A factory-provided
Default boot vector values and ISP entry points
Rev. 03 — 10 November 2008
Default boot vector
FCH
DD
, V
SS
, TXD, RXD, and RST). Only a small connector needs to
80C51 with 512 B/1 kB/2 kB RAM, dual I
Default bootloader
entry point
FC00H
P89V660/662/664
Default bootloader code
range
FC00H to FFFFH
© NXP B.V. 2008. All rights reserved.
2
C-bus, SPI
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