ATTINY9-MAHR Atmel, ATTINY9-MAHR Datasheet - Page 96

IC MCU AVR 1K FLASH 8UDFN

ATTINY9-MAHR

Manufacturer Part Number
ATTINY9-MAHR
Description
IC MCU AVR 1K FLASH 8UDFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY9-MAHR

Package / Case
8-UDFN Exposed Pad
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
1KB (1K x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY9-MAHR
Manufacturer:
ST
Quantity:
101
13.12.4
13.12.5
96
ATtiny4/5/9/10
ADCL
DIDR0
ADC Data Register
Digital Input Disable Register 0
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
Table 13-4.
When an ADC conversion is complete, the result is found in the ADC register.
• Bits 7:0 – ADC7:0: ADC Conversion Result
These bits represent the result from the conversion.
• Bits 7:4 – Res: Reserved Bit
These bits are reserved and will always read zero.
• Bits 3:0 – ADC3D..ADC0D: ADC3..0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC3..0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
0x19
Read/Write
Initial Value
Bit
0x17
Read/Write
Initial Value
ADTS2
0
0
0
0
1
1
1
1
ADC7
ADC Auto Trigger Source Selections
R
7
0
R
7
0
ADC6
R
6
0
R
6
0
ADTS1
0
0
1
1
0
0
1
1
ADC5
R
5
0
R
5
0
ADC4
R
R
4
0
4
0
ADTS0
0
1
0
1
0
1
0
1
ADC3D
ADC3
R/W
R
3
0
3
0
ADC2D
ADC2
R/W
R
2
0
2
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Flag 0
Timer/Counter 0 Compare Match A
Timer/Counter 0 Overflow
Timer/Counter 0 Compare Match B
Pin Change Interrupt 0 Request
Timer/Counter 0 Capture Event
ADC1D
ADC1
R/W
R
1
0
1
0
ADC0
ADC0D
R/W
R
0
0
0
0
ADCL
DIDR0
8127D–AVR–02/10
.

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