ATTINY9-MAHR Atmel, ATTINY9-MAHR Datasheet - Page 74

IC MCU AVR 1K FLASH 8UDFN

ATTINY9-MAHR

Manufacturer Part Number
ATTINY9-MAHR
Description
IC MCU AVR 1K FLASH 8UDFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY9-MAHR

Package / Case
8-UDFN Exposed Pad
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
1KB (1K x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY9-MAHR
Manufacturer:
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Quantity:
101
11.10.1
11.11 Register Description
11.11.1
74
ATtiny4/5/9/10
Reusing the Temporary High Byte Register
TCCR0A – Timer/Counter0 Control Register A
Note:
The code example requires that the r17:r16 register pair contains the value to be written to
TCNT0.
If writing to more than one 16-bit register where the high byte is the same for all registers written,
then the high byte only needs to be written once. However, note that the same rule of atomic
operation described previously also applies in this case.
• Bits 7:6 – COM0A1:0: Compare Output Mode for Channel A
• Bits 5:4 – COM0B1:0: Compare Output Mode for Channel B
The COM0A1:0 and COM0B1:0 control the behaviour of Output Compare pins OC0A and
OC0B, respectively. If one or both COM0A1:0 bits are written to one, the OC0A output overrides
the normal port functionality of the I/O pin it is connected to. Similarly, if one or both COM0B1:0
bit are written to one, the OC0B output overrides the normal port functionality of the I/O pin it is
connected to.
Note, however, that the Data Direction Register (DDR) bit corresponding to the OC0A or OC0B
pin must be set in order to enable the output driver.
Bit
0x2E
Read/Write
Initial Value
Assembly Code Example
TIM16_WriteTCNT0:
; Save global interrupt flag
in r18,SREG
; Disable interrupts
cli
; Set TCNT0 to r17:r16
out TCNT0H,r17
out TCNT0L,r16
; Restore global interrupt flag
out SREG,r18
ret
See
“Code Examples” on page
COM0A1
R/W
7
0
COM0A0
R/W
6
0
COM0B1
R/W
5
0
5.
COM0B0
R/W
4
0
R
3
0
R
2
0
WGM01
R/W
1
0
WGM00
R/W
0
0
8127D–AVR–02/10
TCCR0A

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