MC9S08EL16CTJ Freescale Semiconductor, MC9S08EL16CTJ Datasheet - Page 84

• Manufacturer Part Number: MC9S08EL16CTJ
• Description: MCU 16KB FLASH SLIC 20TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08EL16CTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: S08EL
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, I2C, SLIC
• Maximum Clock Frequency: 200 KHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08EL32AUTO, DEMO9S08EL32
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 6 Parallel Input/Output Control
6.5.1.3
6.5.1.4
84
PTAPE[7:6]
PTAPE[3:0]
PTASE[7:6]
PTASE[3:0]
Reset:
Reset:
Field
Field
7:0
3:0
7:6
3:0
W
W
R
R
PTAPE7
PTASE7
Internal Pull Enable for Port A Bits — Each of these control bits determines if the internal pull-up or internal
(pin interrupt only) pull-down device is enabled for the associated PTA pin. For port A pins that are configured as
outputs, these bits have no effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port A bit n.
1 Internal pull-up/pull-down device enabled for port A bit n.
Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
Port A Pull Enable Register (PTAPE)
0
Port A Slew Rate Enable Register (PTASE)
0
7
7
PTAPE6
PTASE6
Figure 6-5. Internal Pull Enable for Port A Register (PTAPE)
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Figure 6-6. Slew Rate Enable for Port A Register (PTASE)
0
0
6
6
Table 6-3. PTAPE Register Field Descriptions
Table 6-4. PTASE Register Field Descriptions
0
0
0
0
5
5
0
0
0
0
4
4
Description
Description
PTAPE3
PTASE3
3
0
3
0
PTAPE2
PTASE2
0
0
2
2
PTAPE1
PTASE1
Freescale Semiconductor
0
0
1
1
PTAPE0
PTASE0
0
0
0
0