MC9S08EL16CTJ Freescale Semiconductor, MC9S08EL16CTJ Datasheet - Page 291

MCU 16KB FLASH SLIC 20TSSOP

MC9S08EL16CTJ

Manufacturer Part Number
MC9S08EL16CTJ
Description
MCU 16KB FLASH SLIC 20TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08EL16CTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08EL
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI, I2C, SLIC
Maximum Clock Frequency
200 KHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08EL32AUTO, DEMO9S08EL32
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.3.5
These read/write registers contain the captured TPM counter value of the input capture function or the
output compare value for the output compare or PWM functions. The channel registers are cleared by
reset.
In input capture mode, reading either byte (TPMxCnVH or TPMxCnVL) latches the contents of both bytes
into a buffer where they remain latched until the other half is read. This latching mechanism also resets
Freescale Semiconductor
Reset
Reset
W
W
R
R
Bit 15
Bit 7
TPM Channel Value Registers (TPMxCnVH:TPMxCnVL)
0
0
7
7
CPWMS
0
1
Figure 16-13. TPM Channel Value Register High (TPMxCnVH)
Figure 16-14. TPM Channel Value Register Low (TPMxCnVL)
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
14
MSnB:MSnA
0
6
0
6
6
XX
1X
00
01
Table 16-7. Mode, Edge, and Level Selection
13
5
0
5
5
0
ELSnB:ELSnA
X1
X1
01
10
11
01
10
11
10
10
12
0
4
0
4
4
Output compare
Center-aligned
Edge-aligned
Input capture
Mode
PWM
PWM
11
0
3
0
3
3
Capture on falling edge
Capture on rising edge
Set output on compare
High-true pulses (clear
High-true pulses (clear
output on compare-up)
output on compare-up)
10
0
2
0
2
2
Low-true pulses (set
Low-true pulses (set
Capture on rising or
output on compare)
output on compare)
Toggle output on
Clear output on
Configuration
falling edge
compare
compare
Timer/PWM Module (S08TPMV3)
only
only
1
9
0
1
1
0
Bit 8
Bit 0
0
0
0
0
293

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