MC9S08EL16CTJ Freescale Semiconductor, MC9S08EL16CTJ Datasheet - Page 218
![MCU 16KB FLASH SLIC 20TSSOP](/photos/12/26/122655/mc9s08el16ctj_sml.jpg)
MC9S08EL16CTJ
Manufacturer Part Number
MC9S08EL16CTJ
Description
MCU 16KB FLASH SLIC 20TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.DEMO9S08EL32.pdf
(356 pages)
Specifications of MC9S08EL16CTJ
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08EL
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI, I2C, SLIC
Maximum Clock Frequency
200 KHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08EL32AUTO, DEMO9S08EL32
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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The LIN 1.3 and earlier specifications transmit a checksum byte in the “CHECKSUM FIELD” of the LIN
message frame. This CHECKSUM FIELD contains the inverted modulo-256 sum over all data bytes. The
sum is calculated by an “ADD with Carry” where the carry bit of each addition is added to the least
significant bit (LSB) of its resulting sum. This guarantees security also for the MSBs of the data bytes. The
sum of modulo-256 sum over all data bytes and the checksum byte must be ‘0xFF’.
An optional checksum calculation can also be performed on a LIN data frame which is very similar to the
LIN 1.3 calculation, but with one important distinction. This enhanced calculation simply includes the
identifier field as the first value in the calculation, whereas the LIN 1.3 calculation begins with the least
significant byte of the data field (which is the first byte to be transmitted on the bus). This enhanced
calculation further ensures that the identifier field is correct and ties the identifier and data together under
a common calculation, ensuring greater reliability.
In the SLIC module, either checksum calculation can be performed on any given message frame by simply
writing or clearing CHKMOD in SLCDLC, as desired, when the identifier for the message frame is
decoded. The appropriate calculation for each message frame should be decided at system design time and
documented in the LIN description file, indicating to the user which calculation to use for a particular
identifier.
12.6.14 High-Speed LIN Operation
High-speed LIN operation does not necessarily require any reconfiguration of the SLIC module,
depending upon what maximum LIN bit rate is desired. Several factors affect the performance of the SLIC
module at LIN speeds higher than 20 kbps, all of which are functions of the speed of the SLIC clock and
the prescaler of the digital filter. The tightest constraint comes from the need to maintain ±1.5% accuracy
with the master node timing. This requires that the SLIC module be able to sample the incoming data
stream accurately enough to guarantee that accuracy.
allowable to maintain this accuracy.
220
Table 12-12. Maximum Theoretical LIN Bit Rates for High-Speed Operation
SLIC Clock
(MHz)
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
20
18
16
14
12
10
8
6
4
2
Max LIN Speed w/ 1%
Accuracy (bps)
200,000
180,000
160,000
140,000
120,000
100,000
Table 12-12
80,000
60,000
40,000
20,000
Max LIN Speed w/ 1.5%
shows the maximum LIN bit rates
Accuracy (bps)
300,000
270,000
240,000
210,000
180,000
150,000
120,000
90,000
60,000
30,000
Freescale Semiconductor
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