M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 251

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
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2
Table 17.5 Repeat Sweep Mode 0 Specifications
0
Function
Start Condition
Stop Condition
Interrupt Request Generation Timing • When the DUS bit in the AD0CON3 register is set to "0" (DMAC operating mode
Analog Voltage Input Pins
Reading of A/D Conversion Result • When the DUS bit is set to "0", the microcomputer reads the AD0j register (j=0 to
C
17.1.4 Repeat Sweep Mode 0
1
9
0 .
8 /
B
In repeat sweep mode 0, analog voltage applied to selected pins is repeatedly converted to a digital code.
Table 17.5 lists specifications of repeat sweep mode 0.
0
0
0
2
7
G
N
1
o
o r
0 -
. v
u
1
p
0
0
Item
, 1
0
2
0
0
5
Page 230
f o
The SCAN1 and SCAN0 bits in the AD0CON1 register select pins. Analog voltage
Select from AN
applied to the pins is repeatedly converted to a digital code
Same as one-shot mode
The ADST bit in the AD0CON0 register is set to "0" (A/D conversion stopped) by
program
• When DUS bit is set to "1" (DMAC operating mode enabled), an interrupt request
to AN
• When the DUS bit is set to "1", do not read the AD00 register. A/D conversion
disabled), no interrupt request is generated
is generated every time an A/D conversion is completed
7) corresponding to selected pins
3
result is stored in the AD00 register after the A/D conversion is completed.
DMAC transfers the conversion result to any memory space. Refer to 12. DMAC
for DMAC settings
3
0
7
(8 pins)
0
and AN
1
(2 pins), AN
Specification
0
to AN
3
(4 pins), AN
0
to AN
17. A/D Converter
5
(6 pins) or AN
0

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