M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 155
![IC M32C/80 MCU ROMLESS 100LQFP](/photos/12/19/121989/m30800sagp-bl_u_sml.jpg)
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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R
R
M
e
E
3
. v
J
2
Figure 14.7 TRGSR Register and TCSPR Register
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
0 -
Trigger Select Register
Count Source Prescaler Register
. v
b7
b7
u
1
NOTES:
NOTE:
0
p
0
b6
b6
, 1
0
1. Set the CST bit to "0" before the CNT3 to CNT0 bits are rewritten.
2. The TCSPR register maintains values set before reset, even after software reset or watchdog timer
1. Overflow or underflow
2
b5
b5
reset has performed.
0
0
5
b4
b4
Page 134
b3
b3
b2
b2
b1
b1
b0
b0
f o
TA1TGH
TA2TGH
TA3TGH
TA4TGH
TA1TGL
TA2TGL
TA3TGL
TA4TGL
(b6 - b4)
3
Symbol
Symbol
CNT1
CNT2
CNT3
CNT0
3
CST
Bit
Bit
0
Symbol
TRGSR
Symbol
TCSPR
Operation Enable Bit
Timer A1 Event/Trigger
Select Bit
Timer A2 Event/Trigger
Select Bit
Timer A3 Event/Trigger
Select Bit
Timer A4 Event/Trigger
Select Bit
Divide Ratio Select Bit
Reserved Bit
Bit Name
Bit Name
0343
035F
Address
Address
16
16
(1)
b7 b6
b3 b2
b5 b4
b1
0 0: Selects an input to the TA1
0 1: Selects the TB2 overflows
1 0: Selects the TA0 overflows
1 1: Selects the TA2 overflows
0 0: Selects an input to the TA2
0 1: Selects the TB2 overflows
1 0: Selects the TA1 overflows
1 1: Selects the TA3 overflows
0 0: Selects an input to the TA3
0 1: Selects the TB2 overflows
1 0: Selects the TA2 overflows
1 1: Selects the TA4 overflows
0 0: Selects an input to the TA4
0 1: Selects the TB2 overflows
1 0: Selects the TA3 overflows
1 1: Selects the TA0 overflows
If setting value is n, f
main clock, on-chip oscillator or
PLL clock divided by 2n.
Not divided if n=0.
0: Stops a divider
1: Starts a divider
When read,
its content is indeterminate
b0
After Reset
00
16
After Reset
0XXX 0000
Function
Function
2n
(2)
is the
2
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
IN
IN
IN
IN
pin
pin
pin
pin
14. Timer (Timer A)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
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