M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 162

• Manufacturer Part Number: M30800SAGP-BL#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
3
. v
J
2
Figure 14.10 Two-Phase Pulse (A-phase and B-phase) and Z-phase
Figure 14.11 Counter Reset Timing
0
C
1
9
8 /
0 .
B
0
0
0
14.1.2.1 Counter Reset by Two-Phase Pulse Signal Processing
2
G
Z-phase input resets the timer counter when processing a two-phase pulse signal.
This function can be used in timer A3 event counter mode, two-phase pulse signal processing, free-
running count operation type or multiply-by-4 processing. The Z-phase signal is applied to the INT2 pin.
When the TAZIE bit in the ONSF register is set to "1" (Z-phase input enabled), Z-phase input can
reset the timer counter. To reset the counter by a Z-phase input, set the TA3 register to "0000
beforehand.
Z-phase input is enabled when the edge of the signal applied to the INT2 pin is detected. The POL bit
in the INT2IC register can determine edge polarity. The Z-phase must have a pulse width of one timer
A3 count source cycle or more . Figure 14.10 shows two-phase pulses (A-phase and B-phase) and
the Z-phase.
Z-phase input resets the timer counter in the next count source following Z-phase input. Figure 14.11
shows the counter reset timing.
Timer A3 interrupt request is generated twice continuously when a timer A3 overflow or underflow,
and a counter reset by INT2 input occur at the same time. Do not use the timer A3 interrupt request
when this function is used.
7
N
1
o r
o
0 -
. v
u
1
p
0
TA3
(A-phase)
Count source
0
TA3
(B-phase)
INT2
(Z-phase)
, 1
0
TA3
(A-phase)
TA3
(B-phase)
Count source
INT2
(Z-phase)
Counter value
OUT
IN
2
(1)
0
0
IN
OUT
5
(1)
Page 141
Pulse width of one count source cycle
or more is required
_______
f o
3
m
3
0
Timer counter is reset
at this timing
m+1
1
2
NOTE:
1. When the rising edge of INT2 is selected.
NOTE:
3
1. When the rising edge of INT2 is selected.
4
5
_______
14. Timer (Timer A)
_______
16
"