M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 124
![IC M32C/80 MCU ROMLESS 100LQFP](/photos/12/19/121989/m30800sagp-bl_u_sml.jpg)
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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M
R
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e
E
3
. v
J
2
Figure 10.14 IIO0IR to IIO4IR Registers
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
Interrupt Request Register
0 -
b7
. v
SIOiRR: Intelligent I/O Communication Unit i Receive Interrupt Request
SIOiTR: Intelligent I/O Communication Unit i Transmit Interrupt Request
GiTOR: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Request (TO: Output to Transmit)
GiRIR: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Request (RI: Input to Receive)
SRTiR: Intelligent I/O Special Communication Function Interrupt Request
NOTES:
Bit Symbols for the Interrupt Request Register
-: Reserved Bit. Set to "0"
u
1
Symbol
IIO0IR
IIO1IR
IIO2IR
IIO3IR
IIO4IR
0
p
0
b6
1. See table below for bit symbols.
2. Only "0" can be set (nothing is changed even if "1" is set).
, 1
0
b5
2
0
0
b4
5
Address
00A0
00A1
00A2
00A3
00A4
b3
0 0 0
Page 103
16
16
16
16
16
b2
b1
SRT0R
Bit 7
-
-
-
-
b0
f o
(b3 - b1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
3
Symbol
3
(b0)
SRT1R
Bit
0
Symbol
IIO0IR to IIO4IR
Bit 6
-
-
-
-
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Reserved bit. Set to "0".
When read, its content is indeterminate.
0: Requests no interrupt
1: Requests an interrupt
0: Requests no interrupt
1: Requests an interrupt
0: Requests no interrupt
1: Requests an interrupt
0: Requests no interrupt
1: Requests an interrupt
SIO0RR
SIO1RR
SIO0TR
SIO1TR
Bit 5
-
G0TOR
G1TOR
G0RIR
G1RIR
Bit 4
-
Bit 3
(2)
(2)
(2)
(2)
-
-
-
-
-
Function
Address
See below
Bit 2
-
-
-
-
-
Bit 1
-
-
-
-
-
After Reset
0000 000X
Bit 0
-
-
-
-
-
2
i=0, 1
RW
RW
RW
RW
RW
RW
10. Interrupts
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