AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 897

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6289C–ATARM–28-May-09
23 SDRAM Controller (SDRAMC) ............................................................ 205
24 Error Corrected Code (ECC) Controller ............................................. 229
25 Peripheral DMA Controller (PDC) ....................................................... 239
26 Clock Generator ................................................................................... 255
27 Power Management Controller (PMC) ................................................ 262
22.9 Automatic Wait States .......................................................................................178
22.10 Data Float Wait States ....................................................................................183
22.11 External Wait ...................................................................................................187
22.12 Slow Clock Mode .............................................................................................193
22.13 Asynchronous Page Mode ..............................................................................196
22.14 Static Memory Controller (SMC) User Interface ..............................................199
23.1 Description ........................................................................................................205
23.2 I/O Lines Description .........................................................................................205
23.3 Application Example ..........................................................................................206
23.4 Product Dependencies ......................................................................................208
23.5 Functional Description .......................................................................................210
23.6 SDRAM Controller User Interface .....................................................................218
24.1 Description ........................................................................................................229
24.2 Block Diagram ...................................................................................................229
24.3 Functional Description .......................................................................................229
24.4 Error Corrected Code (ECC) Controller User Interface .....................................234
25.1 Description ........................................................................................................239
25.2 Block Diagram ...................................................................................................240
25.3 Functional Description .......................................................................................241
25.4 Peripheral DMA Controller (PDC) User Interface ..............................................244
26.1 Description ........................................................................................................255
26.2 Slow Clock Crystal Oscillator .............................................................................255
26.3 Slow Clock RC Oscillator ...................................................................................255
26.4 Slow Clock Selection .........................................................................................255
26.5 Main Oscillator ...................................................................................................258
26.6 Divider and PLL Block .......................................................................................259
27.1 Description ........................................................................................................262
27.2 Master Clock Controller .....................................................................................262
27.3 Processor Clock Controller ................................................................................263
AT91SAM9R64/RL64 Preliminary
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