AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 350
AT91SAM9RL64-CU
Manufacturer Part Number
AT91SAM9RL64-CU
Description
IC ARM9 MCU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9RL64-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
118
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
Package
217LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
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31.4
Figure 31-3. I/O Line Control Logic
350
Output Enable
Output Enable
Peripheral A
Peripheral B
Functional Description
Peripheral A
Peripheral B
PIO_BSR[0]
PIO_ASR[0]
AT91SAM9R64/RL64 Preliminary
Output
Output
PIO_ABSR[0]
PIO_OER[0]
PIO_ODR[0]
The PIO Controller features up to 32 fully-programmable I/O lines. Most of the control logic asso-
ciated to each I/O is represented in
represents but one of up to 32 possible indexes.
1
1
0
0
PIO_OSR[0]
PIO_IFER[0]
PIO_IFDR[0]
PIO_SODR[0]
PIO_CODR[0]
PIO_IFSR[0]
PIO_PER[0]
PIO_PDR[0]
Glitch
Filter
PIO_ODSR[0]
PIO_PSR[0]
PIO_PDSR[0]
1
0
PIO_IER[31]
PIO_IDR[31]
PIO_IER[0]
PIO_IDR[0]
1
0
1
0
Detector
Edge
PIO_IMR[31]
PIO_ISR[31]
PIO_IMR[0]
PIO_ISR[0]
PIO_MDER[0]
PIO_MDDR[0]
Figure
PIO_MDSR[0]
31-3. In this description each signal shown
(Up to 32 possible inputs)
1
0
0
1
PIO_PUER[0]
PIO_PUDR[0]
PIO_PUSR[0]
PIO Interrupt
Peripheral B
Peripheral A
Input
Input
6289C–ATARM–28-May-09
Pad
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