AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 505

IC ARM9 MCU 217-LFBGA

AT91SAM9RL64-CU

Manufacturer Part Number
AT91SAM9RL64-CU
Description
IC ARM9 MCU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9RL64-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
118
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
Package
217LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 35-10. Transmit Start Mode
Figure 35-11. Receive Pulse/Edge Start Modes
6289C–ATARM–28-May-09
Start = Low Level on TF
Start = Falling Edge on TF
Start = Low Level on RF
Start = Falling Edge on RF
Start = High Level on TF
Start = Rising Edge on TF
Start = Level Change on TF
Start = Any Edge on TF
Start = High Level on RF
Start = Rising Edge on RF
Start = Level Change on RF
Start = Any Edge on RF
A start can be programmed in the same manner on either side of the Transmit/Receive Clock
Register (RCMR/TCMR). Thus, the start could be on TF (Transmit) or RF (Receive).
Moreover, the Receiver can start when data is detected in the bit stream with the Compare
Functions.
Detection on TF/RF input/output is done by the field FSOS of the Transmit/Receive Frame Mode
Register (TFMR/RFMR).
(Output)
(Output)
(Output)
(Output)
(Output)
(Output)
(Input)
(Input)
(Input)
(Input)
(Input)
(Input)
(Input)
(Input)
RD
RD
RD
RD
RD
RD
TD
TD
TD
TD
TD
TD
RF
TF
RK
TK
X
X
X
X
X
X
X
X
AT91SAM9R64/RL64 Preliminary
BO
BO
BO
BO
X
X
X
X
BO
BO
B1
BO
B1
B1
BO
B1
B1
B1
BO
B1
BO
BO
B1
BO
BO
B1
BO
B1
BO
B1
BO
B1
B1
B1
B1
B1
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
STTDLY
505

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