AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 657

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 39-5.
39.5.2.5
6289C–ATARM–28-May-09
Pixel
1bpp
Pixel
2bpp
Pixel
4bpp
Pixel
8bpp
Pixel
16bpp
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
unpacked
Mem
Addr
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8
12
Palette
WinCE Pixel Memory Organization
6
13
not used
0x3
3
1
14
This block is used to generate the pixel gray or color information in palletized configurations. The
different modes with the palletized/non-palletized configuration can be found in
these modes, 1, 2, 4 or 8 input bits index an entry in the lookup table. The corresponding entry in
the lookup table contains the color or gray shade information for the pixel.
Table 39-6.
The lookup table can be accessed by the host in R/W mode to allow the host to program and
check the values stored in the palette. It is mapped in the LCD controller configuration memory
map. The LUT is mapped as 16-bit half-words aligned at word boundaries, only word write
TFT
TFT
STN Mono
STN Mono
STN Color
STN Color
7
15
1
2
DISTYPE
Palette Configurations
8
4
9
Configuration
0x2
2
3
10
AT91SAM9R64/RL64 Preliminary
PIXELSIZE
1, 2, 4, 8
4
16
16, 24
1, 2
1, 2, 4, 8
5
11
4
9
2
10 11 12 13 14 15 0
5
0
0
0x1
1
6
3
Palette
Palletized
Non-palletized
Palletized
Non-palletized
Palletized
Non-palletized
7
8
0
1
7
0
6
1
0
5
2
1
4
3
Table
0x0
0
2
3
4
3
2
5
39-6. In
1
1
6
657
3
0
7