AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 749

IC ARM9 MCU 217-LFBGA

AT91SAM9RL64-CU

Manufacturer Part Number
AT91SAM9RL64-CU
Description
IC ARM9 MCU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9RL64-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
118
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
Package
217LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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41.4.8.9
41.4.8.10
41.4.8.11
41.4.8.12
6289C–ATARM–28-May-09
Data OUT
Bulk OUT or Interrupt OUT
Bulk OUT or Interrupt OUT: Receiving a Packet Under Application Control (Host to Device)
Bulk OUT or Interrupt OUT: Sending a Buffer Using DMA (Host To Device)
Like data IN, data OUT packets are sent by the host during the data or the status stage of con-
trol transfer or during an interrupt/bulk/isochronous OUT transfer. Data buffers are sent packet
by packet under the control of the application or under the control of the DMA channel.
Algorithm Description for Each Packet:
Note: If the application does not know the size of the transfer, it may not be a good option to use
AUTO_VALID. Because if a zero-length-packet is received, the RX_BK_RDY is automatically
cleared by the AUTO_VALID hardware and if the endpoint interrupt is triggered, the software will
not find its originating flag when reading the UDPHS_EPTSTAx register.
Algorithm to Fill Several Packets:
If the application doesn’t know the size of the receive buffer, instead of using the BUSY_BANK
interrupt, the application must use RX_BK_RDY.
To use the DMA setting, the AUTO_VALID field is mandatory.
See
information.
DMA Configuration Example:
• ERR_FL_ISO + ERR_FLUSH + ERR_TRANS: The first token IN has been treated, the data
• The application enables an interrupt on RX_BK_RDY.
• When an interrupt on RX_BK_RDY is received, the application knows that UDPHS_EPTSTAx
• The application reads the BYTE_COUNT bytes from the endpoint.
• The application clears RX_BK_RDY.
• The application enables the interrupts of BUSY_BANK and AUTO_VALID.
• When a BUSY_BANK interrupt is received, the application knows that all banks available for
1. First program UDPHS_DMAADDRESSx with the address of the buffer that should be
2. Enable the interrupt of the DMA in UDPHS_IEN
3. Program the DMA Channelx Control Register:
for the second Token IN was not available in time, but the second bank has been validated
before the end of the microframe. The third bank has not been validated, but three
transactions have been set in NB_TRANS.
register BYTE_COUNT bytes have been received.
the endpoint have been filled. Thus, the application can read all banks available.
41.4.8.6 Bulk IN or Interrupt IN: Sending a Buffer Using DMA (Device to Host)
transferred.
– Size of buffer to be sent.
– END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered
packet data) at the end of DMA buffer.
AT91SAM9R64/RL64 Preliminary
for more
749

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